參數資料
型號: 28F002BX-T
英文描述: IEEE 802.3af Power-Over-Ethernet Interface/PWM Controller for Power Devices
中文描述: 28F002BX -筆- 2兆位(128K的× 16。256K × 8)啟動塊閃存系列
文件頁數: 35/44頁
文件大?。?/td> 496K
代理商: 28F002BX-T
28F400BL-T/B, 28F004BL-T/B
AC CHARACTERISTICS-Read-Only Operations
(1)
V
CC
e
3.3V
g
0.3V, 5.0V
g
10%
Versions
28F400BL-150
28F004BL-150
Unit
Symbol
Parameter
Notes
Min
Max
t
AVAV
t
RC
Read Cycle Time
150
ns
t
AVQV
t
ACC
Address to Output Delay
150
ns
t
ELQV
t
CE
CE
Y
to Output Delay
2
150
ns
t
PHQV
t
PWH
RP
Y
High to Output Delay
600
ns
t
GLQV
t
OE
OE
Y
to Output Delay
2
65
ns
t
ELQX
t
LZ
CE
Y
to Output Low Z
3
0
ns
t
EHOZ
t
HZ
CE
Y
High to Output High Z
3
55
ns
t
GLQX
t
OLZ
OE
Y
to Output Low Z
3
0
ns
t
GHQZ
t
DF
OE
Y
High to Output High Z
3
45
ns
t
OH
Output Hold from Addresses, CE
Y
or OE
Y
Change, Whichever is First
3
0
ns
t
IR
Input Rise Time
10
ns
t
IF
Input Fall Time
10
ns
t
ELFL
t
ELFH
CE
Y
to BYTE
Y
Switching Low or High
3
5
ns
t
FHQV
BYTE
Y
Switching High to Valid Output Delay
3, 4
150
ns
t
FLQZ
BYTE
Y
Switching Low to Output High Z
3
45
ns
NOTES:
1. See AC Input/Output Reference Waveform for timing measurements.
2. OE
Y
may be delayed up to t
CE
-t
OE
after the falling edge of CE
Y
without impact on t
CE
.
3. Sampled, not 100% tested.
4. t
FLQV
, BYTE
Y
switching low to valid output delay will be equal to t
AVQV
, measured from the time DQ
15
/A
-1
becomes
valid.
35
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