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參數(shù)資料
| 型號： | 28F001BX-B |
| 英文描述： | 1-MBIT (128K x 8) BOOT BLOCK FLASH MEMORY |
| 中文描述： | 1兆位（128K的× 8）引導(dǎo)塊閃存 |
| 文件頁數(shù)： | 18/44頁 |
| 文件大小： | 496K |
| 代理商： | 28F001BX-B |
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28F400BL-T/B, 28F004BL-T/B
4.2 28F004BL Bus Operations
Table 3. Bus Operations
Mode
Notes
RP
Y
CE
Y
OE
Y
WE
Y
A
9
A
0
V
PP
DQ
0-7
Read
1, 2
V
IH
V
IL
V
IL
V
IH
X
X
X
D
OUT
Output Disable
V
IH
V
IL
V
IH
V
IH
X
X
X
High Z
Standby
V
IH
V
IH
X
X
X
X
X
High Z
Deep Power-Down
9
V
IL
X
X
X
X
X
X
High Z
Intelligent Identifier (Mfr)
3, 4
V
IH
V
IL
V
IL
V
IH
V
ID
V
IL
X
89H
Intelligent Identifier (Device)
3, 4, 5, 10
V
IH
V
IL
V
IL
V
IH
V
ID
V
IH
X
78H
79H
Write
6, 7, 8
V
IH
V
IL
V
IH
V
IL
X
X
X
D
IN
NOTES:
1. Refer to DC Characteristics.
2. X can be V
IL
or V
IH
for control pins and addresses, V
PPL
or V
PPH
for V
PP
.
3. See DC Characteristics for V
PPL
, V
PPH
, V
HH
, V
ID
voltages.
4. Manufacturer and Device codes may also be accessed via a CUI write sequence. A
1
–A
8
, A
10
–A
18
e
V
IL
.
5. Device ID
e
78H for 28F004BL-T and 79H for 28F004BL-B.
6. Refer to Table 4 for valid D
IN
during a write operation.
7. Command writes for Block erase or byte program are only executed when V
PP
e
V
PPH
.
8. Program or erase the Boot block by holding RP
Y
at V
HH
.
9. RP
Y
must be at GND
g
0.2V to meet the 1.2
m
A maximum deep power-down current.
10. The device ID codes are identical to those of the 28F004BX 5V version and SmartVoltage equivalent.
4.3 Read Operations
The 4-Mbit flash family has three user read modes;
Array, Intelligent Identifier, and Status Register.
Status Register read mode will be discussed in detail
in the ‘‘Write Operations’’ section.
During power-up conditions (V
CC
supply ramping), it
takes a maximum of 600 ns from V
CC
at 3.0V mini-
mum to obtain valid data on the outputs.
4.3.1 READ ARRAY
If the memory is not in the Read Array mode, it is
necessary to write the appropriate read mode com-
mand to the CUI. The 4-Mbit flash family has three
control functions, all of which must be logically ac-
tive, to obtain data at the outputs. Chip-Enable CE
Y
is the device selection control. Power-Down RP
Y
is
the device power control. Output-Enable OE
Y
is the
DATA INPUT/OUTPUT (DQ
[
0:15
]
or DQ
[
0:7
]
) direc-
tion control and when active is used to drive data
from the selected memory onto the I/O bus.
4.3.1.1 Output Control
With OE
Y
at logic-high level (V
IH
), the output from
the device is disabled and data input/output pins
(DQ
[
0:15
]
or DQ
[
0:7
]
are tri-stated. Data input is
then controlled by WE
Y
.
4.3.1.2 Input Control
With WE
Y
at logic-high level (V
IH
), input to the de-
vice is disabled. Data Input/Output pins (DQ
[
0:15
]
or DQ
[
0:7
]
) are controlled by OE
Y
.
4.3.2 INTELLIGENT IDENTlFlERS
28F400BL PRODUCTS
The manufacturer and device codes are read via the
CUI or by taking the A9 pin to 12V. Writing 90H to
the CUI places the device into Intelligent Identifier
read mode. A read of location 00000H outputs the
manufacturer’s identification code, 0089H, and loca-
tion 00001H outputs the device code; 4470H for
28F400BL-T,
4471H
for
BYTE
Y
is at a logic low only the lower byte of the
above signatures is read and DQ
15
/A
b
1
is a ‘‘don’t
care’’ during Intelligent Identifier mode. A read array
command must be written to the CUI to return to the
read array mode.
28F4001BL-B.
When
18
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 28F001BX-T | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:1-MBIT (128K x 8) BOOT BLOCK FLASH MEMORY |
| 28F001BX-T/28F001BX-B/28F001BN-T/BN-B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:28F001BX-T/28F001BX-B/28F001BN-T/BN-B |
| 28F001BX-T/B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:28F001BX-T/B |
| 28F002BC | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:28F002BC 2-MBIT (256K X 8) BOOT BLOCK FLASH MEMORY |
| 28F002BL-B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:2-MBIT (128K x 16. 256K x 8) LOW-POWER BOOT BLOCK FLASH MEMORY FAMILY |
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