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參數(shù)資料
| 型號： | 28C64A-25L |
| 廠商： | Microchip Technology Inc. |
| 元件分類： | EEPROM |
| 英文描述： | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
| 中文描述： | 該CAT24FC02是一個2 KB的EEPROM的國內(nèi)256個8位每字舉辦的串行CMOS |
| 文件頁數(shù)： | 4/8頁 |
| 文件大?。?/td> | 67K |
| 代理商： | 28C64A-25L |
28C64A
DS11109H-page 4
1996 Microchip Technology Inc.
TABLE 1-4:
BYTE WRITE AC CHARACTERISTICS
FIGURE 1-2:
PROGRAMMING WAVEFORMS
AC Testing Waveform:
Output Load:
Input Rise/Fall Times:
Ambient Temperature:
V
1 TTL Load + 100 pF
20 ns
Commercial (C):
Industrial (I):
IH
= 2.4V; V
IL
= 0.45V; V
OH
= 2.0V; V
OL
= 0.8V
Tamb
Tamb
=
=
0C to +70C
-40C to +85C
Parameter
Symbol
Min
Max
Units
Remarks
Address Set-Up Time
t
AS
10
—
ns
Address Hold Time
t
AH
50
—
ns
Data Set-Up Time
t
DS
50
—
ns
Data Hold Time
t
DH
10
—
ns
Write Pulse Width
t
WPL
100
—
ns
Note 1
Write Pulse High Time
t
WPH
50
—
ns
OE Hold Time
t
OEH
10
—
ns
OE Set-Up Time
t
OES
10
—
ns
Data Valid Time
t
DV
—
1000
ns
Note 2
Time to Device Busy
t
DB
2
50
ns
Write Cycle Time (
28C64A
)
t
WC
—
1
ms
0.5 ms typical
Write Cycle Time (
28C64A
F)
t
WC
—
200
μ
s
100
μ
s typical
Note 1: A write cycle can be initiated be CE or WE going low, whichever occurs last. The data is latched on the pos-
itive edge WE, whichever occurs first.
2: Data must be valid within 1000ns max. after a write cycle is initiated and must be stable at least until t
the positive edge of WE or CE, whichever occurs first.
DH
after
t
AS
t
AH
t
WPL
t
DS
t
DH
t
OES
t
OEH
t
WC
Address
CE, WE
Data In
OE
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
Rdy/Busy
V
OH
V
OL
t
DB
t
DV
Busy
Ready
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 28C64A-25P | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
| 28C64A-25SO | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
| 28C64A-25TS | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
| 28C64A-25VS | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
| 28C64AF-15IL | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 28C64A-25P | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:64K (8K x 8) CMOS EEPROM |
| 28C64A-25SO | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:64K (8K x 8) CMOS EEPROM |
| 28C64A-25TS | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:64K (8K x 8) CMOS EEPROM |
| 28C64A-25VS | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:64K (8K x 8) CMOS EEPROM |
| 28C64A35B/XA | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:EEPROM |
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