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參數(shù)資料
| 型號： | 27C160 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | Modular Connector Wall Faceplate; For Use With:Panduits NetKey Keystone Modules and Duplex Fiber Optic Modules; Color:White; Number of Positions:1 |
| 中文描述： | 16兆位的2Mb x8或1兆x16紫外線存儲器和OTP存儲器 |
| 文件頁數(shù)： | 8/16頁 |
| 文件大?。?/td> | 110K |
| 代理商： | 27C160 |
M27C160
8/16
Table 9. Programming Mode DC Characteristics
(1)
(T
A
= 25
°
C; V
CC
= 6.25V
±
0.25V; V
PP
= 12.5V
±
0.25V)
Symbol
Parameter
Note: 1. V
CC
must be applied simultaneously with or before V
PP
and removed simultaneously or after V
PP
.
Table 10. ProgrammingMode AC Characteristics
(1)
(T
A
= 25
°
C; V
CC
= 6.25V
±
0.25V; V
PP
= 12.5V
±
0.25V)
Symbol
Alt
Note: 1. V
CC
must be applied simultaneously with or before V
PP
and removed simultaneously or after V
PP
.
2. Sampled only, not 100% tested.
Test Condition
Min
Max
Unit
I
LI
Input Leakage Current
0
≤
V
IN
≤
V
CC
±
1
μ
A
I
CC
Supply Current
50
mA
I
PP
Program Current
E = V
IL
50
mA
V
IL
Input Low Voltage
–0.3
0.8
V
V
IH
Input High Voltage
2.4
V
CC
+ 0.5
V
V
OL
Output Low Voltage
I
OL
= 2.1mA
0.4
V
V
OH
Output High Voltage TTL
I
OH
= –2.5mA
3.5
V
V
ID
A9 Voltage
11.5
12.5
V
Parameter
Test Condition
Min
Max
Unit
t
AVEL
t
AS
Address Valid to Chip Enable Low
2
μ
s
t
QVEL
t
DS
Input Valid to Chip Enable Low
2
μ
s
t
VPHAV
t
VPS
V
PP
High to Address Valid
2
μ
s
t
VCHAV
t
VCS
V
CC
High to Address Valid
2
μ
s
t
ELEH
t
PW
Chip Enable Program Pulse Width
45
55
μ
s
t
EHQX
t
DH
Chip Enable High to Input Transition
2
μ
s
t
QXGL
t
OES
Input Transition to Output Enable Low
2
μ
s
t
GLQV
t
OE
Output Enable Low to Output Valid
120
ns
t
GHQZ(2)
t
DFP
Output Enable High to Output Hi-Z
0
130
ns
t
GHAX
t
AH
Output Enable High to Address
Transition
0
ns
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