
AI01822
3V
High Speed
0V
1.5V
2.4V
Standard
0.4V
2.0V
0.8V
Figure 3. AC TestingInput Output Waveform
AI01823B
1.3V
OUT
CL
CL= 30pF for High Speed
CL= 100pF for Standard
CLincludes JIG capacitance
3.3k
1N914
DEVICE
UNDER
TEST
Figure 4. AC Testing Load Circuit
High Speed
Standard
Input Rise and Fall Times
≤
10ns
≤
20ns
Input Pulse Voltages
0 to 3V
0.4V to 2.4V
Input and Output Timing Ref. Voltages
1.5V
0.8V and 2V
Table5. AC MeasurementConditions
Symbol
Parameter
Test Condition
Min
Max
Unit
C
IN
Input Capacitance
V
IN
= 0V
6
pF
C
OUT
Output Capacitance
V
OUT
= 0V
12
pF
Note:
1. Sampled only,not 100% tested.
Table6. Capacitance
(1)
(T
A
= 25
°
C, f = 1 MHz)
Two Line Output Control
BecauseEPROMsareusuallyusedinlargermem-
ory arrays, this product features a 2 line control
functionwhich accommodatesthe use of multiple
memory connection. The two line control function
allows:
a. the lowestpossiblememory power dissipation,
b. completeassurancethat output bus contention
will not occur.
Forthemostefficientuse of thesetwocontrollines,
E should be decoded and used as the primary
deviceselectingfunction,while G shouldbe made
a common connection to all devices in the array
and connected to the READ line from the system
controlbus.Thisensuresthat all deselectedmem-
ory devices are in their low power standby mode
and that the output pins are only active when data
is requiredfrom a particularmemory device.
SystemConsiderations
The power switching characteristics of Advanced
CMOSEPROMs require careful decouplingof the
devices. The supply current, I
CC
, has three seg-
ments that are of interestto the system designer :
the standby current level, the active current level,
and transient current peaks that are produced by
thefalling and rising edgesof E. Themagnitudeof
transientcurrentpeaksisdependentonthecapaci-
tive and inductive loading of the device at the
output.
4/15
M27C1024