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參數(shù)資料
| 型號(hào)： | 26B01 |
| 英文描述： | LOW SKEW, 1-TO-2 DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER |
| 中文描述： | 低偏移，1至2 DIFFERENTIAL-TO-LVCMOS/LVTTL扇出緩沖器 |
| 文件頁數(shù)： | 1/14頁 |
| 文件大?。?/td> | 240K |
| 代理商： | 26B01 |
83026BMI-01
www.icst.com/products/hiperclocks.html
REV. A JANUARY 16, 2006
1
Integrated
Circuit
Systems, Inc.
ICS83026I-01
L
OW
S
KEW
, 1-
TO
-2
D
IFFERENTIAL
-
TO
-LVCMOS/LVTTL F
ANOUT
B
UFFER
G
ENERAL
D
ESCRIPTION
The ICS83026I-01 is a low skew, 1-to-2 Dif-
ferential-to-LVCMOS/LVTTL Fanout Buffer and
a member of the HiPerClockSfamily of
High Performance Clock Solutions from
ICS. The differential input can accept most dif-
ferential signal types (LVPECL, LVDS, LVHSTL, HCSL and
SSTL) and translate to two single-ended LVCMOS/LVTTL out-
puts. The small 8-lead SOIC footprint makes this device ideal
for use in applications with limited board space.
F
EATURES
Two LVCMOS / LVTTL outputs
Differential CLK, nCLK input pair
CLK, nCLK pair can accept the following differential
input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL
Maximum output frequency: 350MHz
Output skew: 15ps (maximum)
Part-to-part skew: 600ps (maximum)
Additive phase jitter, RMS: 0.03ps (typical)
Small 8 lead SOIC package saves board space
3.3V core, 3.3V, 2.5V or 1.8V output operating supply
-40°C to 85°C ambient operating temperature
Available in both standard and lead-free RoHS compliant
packages
B
LOCK
D
IAGRAM
P
IN
A
SSIGNMENT
ICS83026I-01
8-Lead SOIC
3.8mm x 4.8mm, x 1.47mm package body
M Package
Top View
V
DD
CLK
nCLK
OE
1
2
3
4
Q0
Q1
CLK
nCLK
OE
HiPerClockS
ICS
V
DDO
Q0
Q1
GND
8
7
6
5
ICS83026I-01
8-Lead TSSOP
4.40mm x 3.0mm x 0.925mm
package body
G Package
Top View
V
DD
CLK
nCLK
OE
1
2
3
4
V
DDO
Q0
Q1
GND
8
7
6
5
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