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參數(shù)資料
| 型號： | 25C64 |
| 元件分類： | EEPROM |
| 英文描述： | 64K 8K x 8 Battery-Voltage CMOS E2PROM |
| 中文描述： | 64K的8K的× 8電池電壓的CMOS E2PROM的 |
| 文件頁數(shù)： | 1/9頁 |
| 文件大小： | 91K |
| 代理商： | 25C64 |
CAT25C32/64
32K/64K-Bit SPI Serial CMOS E
2
PROM
FEATURES
I
10 MHz SPI Compatible
I
1.8 to 6.0 Volt Operation
I
Hardware and Software Protection
I
Zero Standby Current
I
Low Power CMOS Technology
I
SPI Modes (0,0 &1,1)
I
Commercial, Industrial and Automotive
Temperature Ranges
DESCRIPTION
I
1,000,000 Program/Erase Cycles
I
100 Year Data Retention
I
Self-Timed Write Cycle
I
8-Pin DIP/SOIC, 16-Pin SOIC, 14-Pin TSSOPand
20-Pin TSSOP
I
64-Byte Page Write Buffer
I
Block Write Protection
– Protect 1/4, 1/2 or all of E
2
PROM Array
PIN CONFIGURATION
SOIC Package (S)
PIN FUNCTIONS
Pin Name
Function
SO
Serial Data Output
SCK
Serial Clock
WP
Write Protect
V
CC
+1.8V to +6.0V Power Supply
V
SS
Ground
CS
Chip Select
SI
Serial Data Input
HOLD
Suspends Serial Input
NC
No Connect
BLOCK DIAGRAM
1999 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
Advanced Information
The CAT25C32/64 is a 32K/64K-Bit SPI Serial CMOS
E
2
PROM internally organized as 4Kx8/8Kx8 bits.
Catalyst’s advanced CMOS Technology substantially
reduces device power requirements. The CAT25C32/
64 features a 64-byte page write buffer. The device
operates via the SPI bus serial interface and is enabled
though a Chip Select (
CS
). In addition to the Chip Select,
the clock input (SCK), data in (SI) and data out (SO) are
required to access the device. The
HOLD
pin may be
used to suspend any serial communication without
resetting the serial sequence. The CAT25C32/64 is
designed with software and hardware write protection
features including Block write protection. The device is
available in 8-pin DIP, 8-pin SOIC, 14-pin TSSOP and
20-pin TSSOP packages.
Doc No. 25087-00 8/99 SPI-1
DIP Package (P)
TSSOP Package (U20)
SENSE AMPS
SHIFT REGISTERS
SPI
CONTROL
LOGIC
WORD ADDRESS
BUFFERS
I/O
CONTROL
E
2
PROM
ARRAY
COLUMN
DECODERS
XDEC
HIGH VOLTAGE/
TIMING CONTROL
SO
SI
STATUS
REGISTER
BLOCK
PROTECT
LOGIC
C
DATA IN
STORAGE
CS
WP
HOLD
SCK
SO
WP
VSS
CS
VCC
HOLD
SCK
SI
1
2
3
4
8
7
6
5
VSS
SO
WP
VCC
HOLD
SCK
SI
1
2
3
4
8
7
6
5
CS
NC
CS
SO
SO
NC
VCC
WP
V
SS
HOLD
NC
NC
SCK
SI
HOLD
NC
NC
NC
NC
NC
NC
1
2
3
4
5
6
7
8
9
10
11
12
14
15
16
17
18
19
20
TSSOP Package (U14)
CS
SO
NC
WP
V
SS
HOLD
NC
NC
NC
SCK
SI
VCC
NC
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
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