參數(shù)資料
型號(hào): 25C256
廠商: Microchip Technology Inc.
英文描述: 256K 5.0V SPI Bus Serial EEPROM(4.5~5.5V,256K位,SPI總線串行EEPROM)
中文描述: 256K 5.0V SPI總線串行EEPROM(4.5?5.5V的,256K位和SPI總線串行EEPROM的)
文件頁數(shù): 75/170頁
文件大小: 4191K
代理商: 25C256
2003 Microchip Technology Inc.
Preliminary
DS40300C-page 73
PIC16F62X
The data on the RB1/RX/DT pin is sampled three times
by a majority detect circuit to determine if a high or a
low level is present at the RX pin. If bit BRGH
(TXSTA<2>) is clear (i.e., at the low baud rates), the
sampling is done on the seventh, eighth and ninth
falling edges of a x16 clock (Figure 12-3). If bit BRGH
is set (i.e., at the high baud rates), the sampling is done
on the 3 clock edges preceding the second rising edge
after the first falling edge of a x4 clock (Figure 12-4 and
Figure 12-5).
FIGURE 12-1:
RX PIN SAMPLING SCHEME. BRGH = 0
FIGURE 12-2:
RX PIN SAMPLING SCHEME, BRGH = 1
FIGURE 12-3:
RX PIN SAMPLING SCHEME, BRGH = 1
RX
baud CLK
x16 CLK
START bit
Bit0
Samples
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1 2 3
Baud CLK for all but START bit
(RB1/RX/DT pin)
RX pin
baud clk
x4 clk
Q2, Q4 clk
START Bit
Bit0
Bit1
First falling edge after RX pin goes low
Second rising edge
Samples
Samples
Samples
1
2
3
4
1
2
3
4
1
2
RX pin
Baud CLK
x4 CLK
Q2, Q4 CLK
START Bit
Bit0
First falling edge after RX pin goes low
Second rising edge
Samples
1
2
3
4
Baud CLK for all but START bit
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