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參數(shù)資料
| 型號(hào)： | 24C16B |
| 廠商： | Microchip Technology Inc. |
| 英文描述： | 16K 5.0V E-Temperature serial EEPROMs(16K位,5.0V，1M次擦寫周期，硬件寫保護(hù)，施密特觸發(fā)輸入的EEPROM) |
| 中文描述： | 16K的5.0V電子溫度（16K的位和5.0V，100萬次擦寫周期，硬件寫保護(hù)，施密特觸發(fā)輸入的EEPROM的串行EEPROM） |
| 文件頁數(shù)： | 8/10頁 |
| 文件大小： | 111K |
| 代理商： | 24C16B |
24C08B/16B
DS21081C-page 8
1995 Microchip Technology Inc.
8.3
Sequential Read
Sequential reads are initiated in the same way as a ran-
dom read except that after the 24C08B/16B transmits
the first data byte, the master issues an acknowledge
as opposed to a stop condition in a random read. This
directs the 24C08B/16B to transmit the next sequen-
tially addressed 8 bit word (see Figure 9-1).
To provide sequential reads the 24C08B/16B contains
an internal address pointer which is incremented by
one at the completion of each operation. This address
pointer allows the entire memory contents to be serially
read during one operation.
8.4
Noise Protection
The 24C08B/16B employs a V
CC
threshold detector
circuit which disables the internal erase/write logic if
the V
CC
is below 1.5 volts at nominal conditions.
The SCL and SDA inputs have Schmitt trigger and filter
circuits which suppress noise spikes to assure proper
device operation even on a noisy bus.
9.0
PIN DESCRIPTIONS
9.1
SDA Serial Address/Data Input/Output
This is a bidirectional pin used to transfer addresses
and data into and data out of the device. It is an open
drain terminal, therefore the SDA bus requires a pull-up
resistor to V
CC
(typical 10
).
For normal data transfer SDA is allowed to change only
during SCL low. Changes during SCL high are
reserved for indicating the START and STOP condi-
tions.
9.2
SCL Serial Clock
This input is used to synchronize the data transfer from
and to the device.
9.3
WP
This pin must be connected to either V
SS
or V
CC
.
If tied to V
SS
, normal memory operation is enabled
(read/write the entire memory 000-7FF).
If tied to V
CC
, WRITE operations are inhibited. The
entire memory will be write-protected. Read opera-
tions are not affected.
This feature allows the user to use the 24C08B/16B as
a serial ROM when WP is enabled (tied to V
CC
).
9.4
A0, A1, A2
These pins are not used by the 24C08B/16B. They
may be left floating or tied to either V
SS
or V
CC
.
FIGURE 9-1:
SEQUENTIAL READ
S
T
O
P
SDA LINE
DATA n
DATA n + 1
BUS ACTIVITY:
MASTER
BUS ACTIVITY:
A
C
K
A
C
K
A
C
K
DATA n + 2
A
C
K
P
DATA n + X
CONTROL
BYTE
N
O
A
C
K
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