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參數(shù)資料
| 型號： | 24C01A-ESN |
| 廠商： | Microchip Technology Inc. |
| 英文描述： | TELECOM BUS SERIALIZER |
| 中文描述： | 1K/2K/4K 5.0VI 2二氧化碳串行EEPROM |
| 文件頁數(shù)： | 3/12頁 |
| 文件大小： | 77K |
| 代理商： | 24C01A-ESN |
1996 Microchip Technology Inc.
DS11183D-page 3
24C01A/02A/04A
TABLE 1-3:
AC CHARACTERISTICS
FIGURE 1-2:
BUS TIMING DATA
Parameter
Symbol
F
CLK
T
HIGH
T
LOW
T
R
T
T
HD
:S
Min.
—
4000
4700
—
—
4000
Typ
—
—
—
—
—
—
Max.
100
—
—
1000
300
—
Units
kHz
ns
ns
ns
ns
ns
Remarks
Clock frequency
Clock high time
Clock low time
SDA and SCL rise time
SDA and SCL fall time
START condition hold time
F
TA
After this period the first
clock pulse is generated
Only relevant for repeated
START condition
START condition setup time
T
SU
:S
TA
4700
—
—
ns
Data input hold time
Data input setup time
Data output delay time
STOP condition setup time
Bus free time
T
T
HD
:D
:D
AT
0
—
—
—
—
—
—
—
ns
ns
SU
T
AT
250
300
4700
4700
AA
:S
3500
—
—
(Note 1)
T
SU
T
TO
ns
ns
BUF
Time the bus must be free
before a new transmission
can start
Input filter time constant
(SDA and SCL pins)
Program cycle time
T
I
—
—
100
ns
T
WC
—
.4
.4N
—
1
N
—
ms
ms
Byte mode
Page mode, N=# of bytes
25
°
C, Vcc = 5.0V, Block
Mode (Note 2)
Endurance
—
1M
cycles
Note 1: As transmitter the device must provide this internal minimum delay time to bridge the undefined region (min-
imum 300 ns) of the falling edge of SCL to avoid unintended generation of START or STOP conditions.
2: This parameter is not tested but guaranteed by characterization. For endurance estimates in a specific appli-
cation, please consult the Total Endurance Model which can be obtained on our BBS or website.
T
SU
:
STA
T
F
T
LOW
T
HIGH
T
R
T
HD
:
DAT
T
SU
:
DAT
T
SU
:
STO
T
HD
:
STA
T
BUF
T
AA
T
AA
T
SP
T
HD
:
STA
SCL
SDA
IN
SDA
OUT
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