參數(shù)資料
型號: 2184
廠商: Analog Devices, Inc.
元件分類: 數(shù)字信號處理
英文描述: DSP Microcomputer
中文描述: DSP微機
文件頁數(shù): 16/31頁
文件大?。?/td> 213K
代理商: 2184
ADSP-2184
–16–
REV. 0
TIMING PARAMETERS
Parameter
Interrupts and Flag
Min
Max
Unit
Timing Requirements
:
t
IFS
t
IFH
IRQx
, FI, or PFx Setup before CLKOUT Low
1, 2, 3, 4
IRQx
, FI, or PFx Hold after CLKOUT High
1, 2, 3, 4
0.25 t
CK
+ 15
0.25 t
CK
ns
ns
Switching Characteristics
:
t
FOH
t
FOD
Flag Output Hold after CLKOUT Low
5
Flag Output Delay from CLKOUT Low
5
0.25 t
CK
– 7
ns
ns
0.5 t
CK
+ 6
NOTES
1
If
IRQx
and FI inputs meet t
IFS
and t
IFH
setup/hold requirements, they will be recognized during the current clock cycle; otherwise the signals will be recognized on the
following cycle. (Refer to “Interrupt Controller Operation” in the Program Control chapter of the
ADSP-2100 Family User’s Manual
,
Third Edition
, for further information
on interrupt servicing.)
2
Edge-sensitive interrupts require pulsewidths greater than 10 ns; level-sensitive interrupts must be held low until serviced.
3
IRQx
=
IRQ0
,
IRQ1
,
IRQ2
,
IRQL0
,
IRQL1
,
IRQE
.
4
PFx = PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7.
5
Flag outputs = PFx, FL0, FL1, FL2, Flag_out.
t
FOD
t
FOH
t
IFH
t
IFS
CLKOUT
FLAG
OUTPUTS
IRQ
x
FI
PFx
Figure 10.Interrupts and Flags
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