參數(shù)資料
型號(hào)： 211BMI03
英文描述： LOW SKEW, 1-TO-2 DIFFERENTIAL-TO-LVHSTL FANOUT BUFFER
中文描述： 低偏移，1至2差分至LVHSTL扇出緩沖器
文件頁(yè)數(shù)： 9/14頁(yè)
文件大?。?/td> 165K
代理商： 211BMI03
85211BMI-03
www.icst.com/products/hiperclocks.html
REV. B NOVEMBER 15, 2005
9
Integrated
Circuit
Systems, Inc.
ICS85211BI-03
L
OW
S
KEW
, 1-
TO
-2
D
IFFERENTIAL
-
TO
-LVHSTL F
ANOUT
B
UFFER
P
OWER
C
ONSIDERATIONS
This section provides information on power dissipation and junction temperature for the ICS85211BI-03.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS85211BI-03 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
DD
= 3.3V + 5% = 3.465V, which gives worst case results.
NOTE:
Please refer to Section 3 for details on calculating power dissipated in the load.
Power (core)
MAX
= V
DD_MAX
* I
DD_MAX
= 3.465V * 55mA =
190.6mW
Power (outputs)
MAX
=
77.76mW/Loaded Output pair
If all outputs are loaded, the total power is 2 * 77.76mW =
155.52mW
Total Power
_MAX
(3.465V, with all outputs switching) =
190.6mW + 155.52mW =
346.12mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device. The maximum recommended junction temperature for HiPerClockS
TM
devices is 125°C.
The equation for Tj is as follows: Tj =
θ
JA
* Pd_total + T
A
Tj = Junction Temperature
θ
JA
= Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
A
= Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
θ
must be used. Assuming a
moderate air flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 103.3°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 0.346W * 103.3°C/W = 120.7°C. This is below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,
and the type of board (single layer or multi-layer).
θ
JA
by Velocity (Linear Feet per Minute)
0
200
500
Single-Layer PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
153.3°C/W
112.7°C/W
128.5°C/W
103.3°C/W
115.5°C/W
97.1°C/W
NOTE:
Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
T
ABLE
6. T
HERMAL
R
ESISTANCE
θ
JA
FOR
8-
PIN
SOIC, F
ORCED
C
ONVECTION
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