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參數(shù)資料
| 型號(hào)： | 20-668-0024 |
| 廠商： | Rabbit Semiconductor |
| 文件頁(yè)數(shù)： | 127/358頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC CPU RABBIT4000 128-LQFP |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 系列： | Rabbit 4000 |
| 處理器類(lèi)型： | Rabbit 4000 8-位 |
| 速度： | 60MHz |
| 電壓： | 2.5V，2.7V，3V，3.3V |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 128-LQFP |
| 供應(yīng)商設(shè)備封裝： | 128-LQFP（14x14） |
| 包裝： | 托盤(pán) |
| 其它名稱(chēng)： | 20-668-0022 316-1078 |
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202
Rabbit 4000 Microprocessor User’s Manual
The network port receiver uses the received preamble to synchronize to the phase of the
incoming frame, and then waits for the start-frame-delimiter. Character assembly begins at
this point and each byte is transferred to the receive FIFO. However, no interrupt or DMA
request will occur until after the first six bytes of the frame have been received and checked
for an address match. The receiver can receive frames independent of the address (promis-
cuous mode), or it can receive frames with a physical address match, a broadcast address
match, or a multicast address match.
Normal DMA transfers of data begin once an address match occurs, and continue until the
end-frame-delimiter is recognized or the line goes idle because of a collision. The network
receiver calculates the CRC across the entire frame in parallel with character assembly
and reports the result when the end-frame-delimiter is recognized. Normally frames with
bad CRC are discarded. The receiver also reports misaligned end-frame-delimiters (those
that do not occur on byte boundaries).
To help with handling high-level protocols such as TCP/IP, the network port receiver accu-
mulates a 16-bit checksum across the entire received frame except for the first 14 bytes.
The first 14 bytes are the destination address field (six bytes), source address field (six
bytes), and the frame length field (two bytes), which are not part of the TCP/IP payload.
This checksum is initialized to all zeros during the address compare time, and then each
pair of bytes is added to the checksum, with the carry from the previous add carried to the
following add. The first-received byte adds to the lower byte of the checksum and the
second-received byte adds to the upper byte of the checksum. In the case of a frame with
an odd length, the second-received byte value is filled with zeros for the 16-bit add. The
checksum at the end of the frame is transferred a holding register so that it can be read by
software.
The network port implements the NLP receive link integrity test state machine, which
requires link integrity pulses to be detected at certain intervals in the absence of other net-
work activity. For this state machine, the link_test_min value is 4.2 ms, and the
link_test_max
value is 52.5 ms. The link_loss time constant is 78.7 ms. If the
network receiver enters the NLP Link Test Fail state because of missing link-test pulses,
this state machine requires seven successive properly timed link test pulses (or an equal
number of FLP bursts) before reporting that the link is again active. The reset state of this
state machine is link-inactive. Note that this is a subtle difference relative to the normal
10Base-T receive link-integrity state machine, which requires either link test pulses or
carrier sense to make the link active.
The network port implements the auto-negotiation algorithm to determine half-duplex or
full-duplex operation. In addition to its normal automatic operation, this feature can be
disabled or commanded to execute under software control.
The clock for the network port is initially disabled to conserve power, but may be sourced
from either a port pin, the system clock (actually the internal peripheral clock), or the sys-
tem clock divided by two. Since the network port requires a 20.000 MHz clock, the clock
should normally be supplied from the port pin. Using the system clock or a derivative to
drive the network port precludes the use of the clock modulator.
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