參數(shù)資料
型號: 1N5360BTA
廠商: MOTOROLA INC
元件分類: 參考電壓二極管
英文描述: 25 V, 5 W, SILICON, UNIDIRECTIONAL VOLTAGE REGULATOR DIODE
封裝: PLASTIC, CASE 17-02, 2 PIN
文件頁數(shù): 5/6頁
文件大?。?/td> 87K
代理商: 1N5360BTA
1N5333B through 1N5388B
Motorola TVS/Zener Device Data
6-5
5 Watt Surmetic 40 Data Sheet
Devices listed in bold, italic are Motorola preferred devices.
I Z
,ZENER
CURRENT
(mA)
VZ, ZENER VOLTAGE (VOLTS)
1000
100
10
1
0.1
10
20
30
40
50
60
70
80
100
10
1
0.1
80
100
120
140
160
180
200
220
VZ, ZENER VOLTAGE (VOLTS)
I Z
,ZENER
CURRENT
(mA)
T = 25
°C
Figure 9. Zener Voltage versus Zener Current
VZ = 11 thru 75 Volts
Figure 10. Zener Voltage versus Zener Current
VZ = 82 thru 200 Volts
APPLICATION NOTE
Since the actual voltage available from a given zener diode
is temperature dependent, it is necessary to determine junc-
tion temperature under any set of operating conditions in order
to calculate its value. The following procedure is recom-
mended:
Lead Temperature, TL, should be determined from:
TL = θLA PD + TA
θLA is the lead-to-ambient thermal resistance and PD is the
power dissipation.
Junction Temperature, TJ, may be found from:
TJ = TL + TJL
TJL is the increase in junction temperature above the lead
temperature and may be found from Figure 4 for a train of
power pulses or from Figure 5 for dc power.
TJL = θJL PD
For worst-case design, using expected limits of IZ, limits of
PD and the extremes of TJ (TJ) may be estimated. Changes
in voltage, VZ, can then be found from:
V = θVZ TJ
θVZ,thezenervoltagetemperaturecoefficient,isfoundfrom
Figures 2 and 3.
Under high power-pulse operation, the zener voltage will
vary with time and may also be affected significantly by the
zener resistance. For best regulation, keep current excursions
as low as possible.
Data of Figure 4 should not be used to compute surge capa-
bility. Surge limitations are given in Figure 6. They are lower
than would be expected by considering only junction tempera-
ture, as current crowding effects cause temperatures to be ex-
tremely high in small spots resulting in device degradation
should the limits of Figure 6 be exceeded.
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