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參數(shù)資料
| 型號(hào)： | 1B51 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Isolated mV/Thermocouple Signal Conditioner(隔離mV/熱電耦信號(hào)調(diào)節(jié)器) |
| 中文描述： | 隔離毫伏/熱電偶信號(hào)調(diào)理（隔離毫伏/熱電耦信號(hào)調(diào)節(jié)器） |
| 文件頁(yè)數(shù)： | 3/4頁(yè) |
| 文件大?。?/td> | 89K |
| 代理商： | 1B51 |
1B51
REV. A
–3–
INSIDE T HE 1B51
Referring to the functional block diagram, the
±
15 V power in-
puts provide power to both the output side circuitry and the
power oscillator. T he 25 kHz power oscillator provides the tim-
ing information for the signal demodulator and drives power
transformer T 2 for the input side power supplies. T he second-
ary winding of T 2 is half wave rectified and filtered to create the
input side bipolar unregulated supplies.
T he signal input (HI) is single-pole filtered for noise rejection
and antialiasing. T he protection clamps limit the voltage at
PROT HI to
±
8 V. T hus, a large voltage applied between HI
and input common (ICOM) appears mostly across the input
resistor.
T he chopper stabilized gain stage amplifies the differential input
voltage with a gain set by external resistors. T he voltage at the
inverting input of the chopper stabilized amplifier (LO) should
be equal to the input voltage at which the desired output voltage
is zero. T his is a true input referred zero suppression function.
T he signal is amplitude modulated onto a 25 kHz carrier and
passed through the signal transformer T 1. T he synchronous de-
modulator restores the signal to the baseband. A two-pole active
low pass stage filters out clock noise and completes a three-pole
Butterworth filter formed with the input pole.
Figure 1. Input Gain Setting and Zero Suppression
USING T HE 1B51
Gain Setting
T he gain of the 1B51 is controlled on the input side by a pair of
user provided resistors (see Figure 1). A feedback resistor of be-
tween 10 k
and 20 k
is required between the feedback pin
(FB) and the gain pin. T he gain setting resistor is connected be-
tween the gain pin and input side common (ICOM). T he gain
equation is
G
=
1
+
R
FB
R
G
×
2
Gains of 2–1000 can be achieved by adjusting this ratio.
T he accuracy of the resistor values must be taken into account
when calculating the initial gain accuracy of an application. T he
initial accuracy of the 1B51 must then be added to the resistor
errors to predict the total accuracy. Likewise, the ratiometric
temperature coefficient of the gain and feedback resistors must
be added to the temperature coefficient of the 1B51 to predict
the total resulting thermal drift.
It is possible to use a trimming potentiometer to correct for ini-
tial gain and system gain errors. T he feedback resistor can be
comprised of a resistor in series with a trimming potentiometer,
as long as the total resistance remains between 10 k
and
20 k
. Alternatively, the gain resistor can also be an adjustable
resistor. In general, the greater the trim range, the coarser the
resolution.
Zero Suppression
Since the 1B51 is a differential input device, true input referred
zero suppression can be accomplished (see Figure 1). A voltage
reference powered by the input side power supplies is applied to
the LO terminal. Since the transfer function is
V
O
=
(
V
(
HI
)±
V
(
LO
))
×
GAIN
the input voltage for which the desired output is zero should be
applied to the LO pin. T he equation is
V
Z
=
1.25(
R
2
/(
R
1
+
R
2
))
Any drift of this input zero suppression voltage appears as offset
drift, so a temperature stable reference should be used. T he
source impedance at the LO terminal should be kept below 1 k
.
Functional Block Diagram
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