Spartan-II/Spartan-IIE Family OTP Configuration PROMs (XC17S00A)
4
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DS078 (v1.8) November 18, 2002
Advance Product Specification
R
The one-time-programmable XC17S00A PROM in
Figure 1
supports automatic loading of configuration programs. An
early DONE inhibits the PROM data output one CCLK cycle
before the Spartan FPGA I/Os become active.
Figure 1:
Master Serial Mode
D
IN
CCLK
INIT
DONE
XC17S00A
PROM
DATA
CLK
CE
Spartan-II/
Spartan-IIE
Master Serial
(Low Resets the Address Pointer)
DS078_01_110601
CCLK
(Output)
D
IN
D
OUT
(Output)
OE/RESET
M0
M1
M2
3.3V
3.3K
V
CC
V
CC
3.3V
3.3K
Notes:
1. If the DriveDone configuration option is not active, pull up DONE with a 3.3k
resistor.
