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參數(shù)資料
| 型號： | 1771S |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | Low-Voltage Synchronous Buck Controller with Precision Enable and No External Compensation |
| 中文描述： | 低電壓同步降壓控制器，具有高精度允許任何外部補償 |
| 文件頁數(shù)： | 14/17頁 |
| 文件大?。?/td> | 772K |
| 代理商： | 1771S |
Layout
The LM1771, like all switching regulators, requires careful
attention to layout to ensure optimal performance. The fol-
lowing steps should be taken to aid in the layout. For more
information refer to Application Note AN-1299.
1.
Ensure that the ground connections of the input capaci-
tor, output capacitor and NMOS are as close as pos-
sible. Ideally these should all be grounded together in
close proximity on the component side of the board.
2.
Keep the switch node small to minimize EMI without
degrading thermal cooling of the FETs.
3.
Locate the feedback resistors close to the IC and keep
the feedback trace as short as possible. Do not run any
feedback traces near the switch node.
Keep the gate traces short and keep them away from the
switch node as much as possible.
If a small bypass capacitor is used on V
(0.1μF) place
it as close to the pin, with the ground connection as
close to the chip ground as possible.
4.
5.
L
www.national.com
14
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