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參數(shù)資料
| 型號： | 1225 |
| 元件分類： | SRAM |
| 英文描述： | 64k Nonvolatile SRAM |
| 中文描述： | 64K的非易失SRAM |
| 文件頁數(shù)： | 1/10頁 |
| 文件大?。?/td> | 147K |
| 代理商： | 1225 |
1 of 10
111899
FEATURES
10 years minimum data retention in the
absence of external power
Data is automatically protected during power
loss
Directly replaces 8k x 8 volatile static RAM
or EEPROM
Unlimited write cycles
Low-power CMOS
JEDEC standard 28-pin DIP package
Read and write access times as fast as 70 ns
Lithium energy source is electrically
disconnected to retain freshness until power
is applied for the first time
Full ±10% V
CC
operating range (DS1225AD)
Optional ±5% V
CC
operating range
(DS1225AB)
Optional industrial temperature range of
-40°C to +85°C, designated IND
PIN ASSIGNMENT
28-Pin ENCAPSULATED PACKAGE
720-mil EXTENDED
PIN DESCRIPTION
A0-A12
DQ0-DQ7
CE
WE
OE
V
CC
GND
NC
- Address Inputs
- Data In/Data Out
- Chip Enable
- Write Enable
- Output Enable
- Power (+5V)
- Ground
- No Connect
DESCRIPTION
The DS1225AB and DS1225AD are 65,536-bit, fully static, nonvolatile SRAMs organized as 8192 words
by 8 bits. Each NV SRAM has a self-contained lithium energy source and control circuitry which
constantly monitors V
CC
for an out-of-tolerance condition. When such a condition occurs, the lithium
energy source is automatically switched on and write protection is unconditionally enabled to prevent
data corruption. The NV SRAMs can be used in place of existing 8k x 8 SRAMs directly conforming to
the popular bytewide 28-pin DIP standard. The devices also match the pinout of the 2764 EPROM and
the 2864 EEPROM, allowing direct substitution while enhancing performance. There is no limit on the
number of write cycles that can be executed and no additional support circuitry is required for
microprocessor interfacing.
DS1225AB/AD
64k Nonvolatile SRAM
www.dalsemi.com
15
13
14
27
26
25
24
23
22
21
20
19
18
17
16
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
GND
VCC
WE
NC
A8
A9
A11
OE
A10
CE
DQ7
DQ6
DQ5
DQ4
DQ3
1
2
3
4
5
6
7
8
9
10
11
12
28
A12
NC
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