參數(shù)資料
型號(hào): 1203P60
廠商: ON SEMICONDUCTOR
英文描述: PWM Current-Mode Controller for Universal Off-Line Supplies Featuring Standby and Short Circuit
中文描述: PWM電流模式控制器的通用離線Supplies以待機(jī)和短路
文件頁數(shù): 9/14頁
文件大小: 145K
代理商: 1203P60
NCP1203
http://onsemi.com
9
Figure 15. Typical Waveforms in Short Circuit Conditions
7.8 V
12.8 V
4.9 V
V
CC
DRIVING PULSES
Calculating the V
CC
Capacitor
The V
CC
capacitor can be calculated knowing the IC
consumption as soon as V
CC
reaches 12.8 V. Suppose that a
NCP1203P60 is used and drives a MOSFET with a 30 nC
total gate charge (Qg). The total average current is thus made
of ICC1 (700 A) plus the driver current, Fsw x Qg or
1.8 mA. The total current is therefore 2.5 mA. The V
available to fully startup the circuit (e.g. never reach the
7.8 V UVLO during power on) is 12.8–7.8 = 5 V. We have
a capacitor who then needs to supply the NCP1203 with
2.5 mA during a given time until the auxiliary supply takes
over. Suppose that this time was measured at around 15 ms.
CV
CC
is calculated using the equation
C
7.5 F
. Select a 22 F/16 V and this will fit.
t · i
V
or
C
Skipping Cycle Mode
The NCP1203 automatically skips switching cycles when
the output power demand drops below a given level. This is
accomplished by monitoring the FB pin. In normal
operation, pin 2 imposes a peak current accordingly to the
load value. If the load demand decreases, the internal loop
asks for less peak current. When this setpoint reaches a
determined level (Vpin 1), the IC prevents the current from
decreasing further down and starts to blank the output
pulses: the IC enters the socalled skip cycle mode, also
named controlled burst operation. The power transfer now
depends upon the width of the pulse bunches (Figure 17).
Suppose we have the following component values:
Lp, primary inductance = 350 H
Fsw , switching frequency = 61 kHz
Ip skip = 600 mA (or 333 mV/Rsense)
The theoretical power transfer is therefore:
1
3.8 W
If this IC enters skip cycle mode with a bunch length of
10 ms over a recurrent period of 100 ms, then the total power
transfer is:
3.8 . 0.1
380 mW
.
To better understand how this skip cycle mode takes place,
a look at the operation mode versus the FB level
immediately gives the necessary insight:
Figure 16.
SKIP CYCLE OPERATION
I
P(min)
= 333 mV/R
SENSE
NORMAL CURRENT
MODE OPERATION
FB
1 V
4.2 V, FB Pin Open
3.2 V, Upper
Dynamic Range
When FB is above the skip cycle threshold (1.0 V by
default), the peak current cannot exceed 1.0 V/Rsense.
When the IC enters the skip cycle mode, the peak current
cannot go below Vpin1/3.3/Rsense. The user still has the
flexibility to alter this 1.0 V by either shunting pin 1 to
ground through a resistor or raising it through a resistor up
to the desired level. Grounding pin 1 permanently
invalidates the skip cycle operation. However, given the
extremely low standby power the controller can reach, the
PWM in noload conditions can quickly enter the minimum
t
on
and still transfer too much power. An instability can take
place. We recommend in that case to leave a little bit of skip
level to always allow 0% duty cycle.
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