參數(shù)資料
型號: 052AC
廠商: Texas Instruments, Inc.
英文描述: ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
中文描述: 增強型場效應(yīng)低失調(diào)運算放大器
文件頁數(shù): 38/68頁
文件大?。?/td> 1336K
代理商: 052AC
TL05x, TL05xA
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178A – FEBRUARY 1997 - REVISED FEBRUARY 2003
43
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
instrumentation amplifier with adjustable gain/null
The instrumentation amplifier in Figure 86 benefits greatly from the high input impedance and stable input offset
voltage of the TL05xA. Amplifiers U1A, U1B, and U2A form the actual instrumentation amplifier, while U2B
provides offset null. Potentiometer R1 provides gain adjustment. With R1 = 2 k
, the circuit gain equals 100,
while with R1 = 200 k
, the circuit gain equals two. The following equation shows the instrumentation amplifier
gain as a function of R1:
A
V
+ 1 ) R2 ) R3
R1
Readjusting the offset null is necessary when the circuit gain is changed. If U2B is needed for another
application, R7 can be terminated at ground. The low input offset voltage of the TL05xA minimizes the dc error
of the circuit. For best matching, all resistors should be one-percent tolerance. The matching between R4, R5,
R6, and R7 controls the CMRR of this application.
The following equation shows the output voltages when the input voltage equals zero. This dc error can be
nulled by adjusting the offset null potentiometer; however, any change in offset voltage over time or temperature
also creates an error. To calculate the error from changes in offset, consider the three offset components in the
equation as delta offsets, rather than initial offsets. The improved stability of Texas Instruments enhanced JFETs
minimizes the error resulting from change in input offset voltage with time. Assuming VI equals zero, VO can
be shown as a function of the offset voltage:
–V
IO1
R3
R1
R7
R5
) R7
1
) R6
R4
) R6
R4
1
) R2
R1
) V
IO3
1
) R6
R4
V
O +
V
IO2
1
) R3
R1
R7
R5
) R7
1
) R6
R4
) R2
R1
R6
R4
NOTE A: U1 and U2 = TL05xA; VCC
± = ±15 V.
100 k
U2A
+
+
+
+
VI–
U1A
R4
10 k
R6
10 k
200 k
R2
10 M
100 k
10 turn
AV = 2 to 100
2 k
R1
U1B
VI+
R5
R7
U2B
0.1
F
Offset Null
VCC–
82 k
82 k
VCC+
R3
VO
10 k
10 k
10 M
1 k
Figure 86. Instrumentation Amplifier
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