
2
100MS
100MS
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Isolation Voltage
Rated Continuous, DC
3500
VDC
Rated Continuous, AC
2000
Vrms
Test
10 Seconds
8000
VDC
Capacitance
5pF
Resistance
1010
Leakage Current
120V, 60Hz
0.23
A
NOTE: Temperature changes (
T/t) greater than 1°C per minute below 0°C and long term storage above 100°C are not recommended.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
SPECIFICATIONS
ELECTRICAL
Specifications apply between solder tabs.
APPLICATIONS INFORMATION
MULTIPLE DEVICE ORIENTATION
A typical application for the 100MS is shown in Figure 3.
Using multiple devices within 30mm of each other can
cause them to interact by forming beat frequency interfer-
ence outputs. The 100MS can reduce this interference by as
much as a factor of 200:1 depending on the distance be-
tween the devices and their relative orientation.
Minimum EMI results when the gaps of both shields are
paralleled as in Figure 3a.
PACKAGE INFORMATION(1)
PACKAGE DRAWING
MODEL
PACKAGE
NUMBER
100MS
EMI Shield
124
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix D of Burr-Brown IC Data Book.
100MS
Gap in Shield
100MS
Gap in Shield
(a) Optimum PCB Layout.
FIGURE 3a. Optimum PCB Layout. Orientation for mini-
mum EMI.
Power
Supply
Common
G = 100
15
9
19
V
OUT1
2
6
7
3
19.6k
10
2M
20k
Thermocouple #1
20
17
16
12
C(1)
100k
14
11
2M
+V
CC
Power
Supply
Common
3656
G = 100
15
9
19
V
OUT2
2
6
7
3
19.6k
10
2M
20k
Thermocouple #2
20
17
16
12
C(1)
100k
14
11
2M
+V
CC
NOTE: (1) C = 0.47F.
3656
C(1) C(1)
13
C(1) C(1)
13
FIGURE 3b. Isolated Data Acquisition Input Circuitry. Orien-
tation for Minimum EMI.