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參數(shù)資料
| 型號(hào)： | μPD78P0308 |
| 廠商： | NEC Corp. |
| 元件分類： | 8位微控制器 |
| 英文描述： | 8 Bit Single Chip Microcontrollers |
| 中文描述： | 8位單片機(jī)微控制器 |
| 文件頁數(shù)： | 35/70頁 |
| 文件大?。?/td> | 556K |
| 代理商： | ΜPD78P0308 |
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35
μ
PD78P0308
Preliminary Data Sheet
SUBSYSTEM CLOCK OSCILLATOR CHARACTERISTICS (T
A
= –40 to +85
°
C, V
DD
= 2.7 to 5.5 V)
Notes 1.
Indicates only oscillator characteristics. Refer to
AC Characteristics
for instruction execution time.
2.
Time required to stabilize oscillation after V
DD
has reached the minimum oscillation voltage range.
Cautions
1.
When using the subsystem clock oscillator, wiring in the area enclosed with the broken line should
be carried out as follows to avoid an adverse effect from wiring capacitance.
Wiring should be as short as possible.
Wiring should not cross other signal lines.
Wiring should not be placed close to a varying high current.
The potential of the oscillator capacitor ground should be the same as V
SS
.
Do not ground it to the ground pattern in which a high current flows.
Do not fetch a signal from the oscillator.
2.
The subsystem clock oscillator is designed as a low-amplification circuit to provide low consump-
tion current, causing misoperation due to noise more frequently than the main system clock
oscillator. Special care should therefore be taken regarding the wiring method when the subsystem
clock is used.
V
DD
= 4.5 to 5.5 V
Crystal resonator
External clock
Oscillation frequency
(f
XT
)
Note 1
Oscillation stabilization
time
Note 2
XT1 input frequency
(f
XT
)
Note 1
XT1 input high-/low-level
width (t
XTH
/t
XTL
)
35
2
10
100
15
32.768
1.2
32
32
5
kHz
s
kHz
μ
s
Resonator
Recommended Circuit
Parameter
Test Conditions
MIN.
TYP.
MAX.
Unit
R2
XT2
XT1
V
PP
C4
C3
XT1
XT2
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