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Preliminary Data Sheet
29
PD78F9026
(2) Serial interface channel 0 (T
A
= -40 to +85 C, V
DD
= 1.8 to 5.5 V)
(i) Three-wire serial I/O mode (SCK0 ...Internal clock output)
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
SCK0
cycle time
t
KCY1
V
DD
= 2.7 to 5.5 V
800
ns
3 200
ns
t
KH1
,
V
DD
= 2.7 to 5.5 V
t
KCY1
/2 - 50
ns
t
KL1
t
KCY1
/2 - 150
ns
t
SIK1
V
DD
150
ns
500
ns
t
KSI1
V
DD
= 2.7 to 5.5 V
400
ns
600
ns
t
KSO1
R = 1 k
,
V
DD
= 2.7 to 5.5 V
0
250
ns
C =100 pF
Note
0
1 000
ns
Note
C and R are the capacitance and resistance of the SO0 output line, respectively.
(ii) Three-wire serial I/O mode (SCK0 ...External clock input)
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
SCK0
cycle time
t
KCY2
V
DD
= 2.7 to 5.5 V
800
ns
3 200
ns
t
KH2
,
V
DD
= 2.7 to 5.5 V
400
ns
t
KL2
1 600
ns
t
SIK2
V
DD
= 2.7 to 5.5 V
100
ns
150
ns
t
KSI2
V
DD
= 2.7 to 5.5 V
400
ns
600
ns
t
KSO2
R = 1 k ,
V
DD
= 2.7 to 5.5 V
0
300
ns
C =100 pF
Note
0
1 000
ns
Note
C and R are the capacitance and resistance of the SO0 output line, respectively.
(iii) UART mode (Dedicated baud rate generator output)
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
Transfer rate
V
DD
= 2.7 to 5.5 V
78 125
bps
19 531
bps
SCK0
high/low
level width
SI0 setup time
(relative to
SCK0
)
SI0 hold time
(relative to
SCK0
)
SI0 hold time
(relative to
SCK0
)
Delay between
SCK0
and SO0
output
SCK0
high/low
level width
SI0 setup time
(relative to
SCK0
)
Delay between
SCK0
and SO0
output