– ii –
3.2
Processor Registers ........................................................................................................... 28
3.2.1
Control registers ........................................................................................................................ 28
3.2.2
General registers ....................................................................................................................... 31
3.2.3
Special function registers (SFR: Special Function Register) ................................................. 32
Addressing of Instruction Address .................................................................................. 35
3.3.1
Relative addressing ................................................................................................................... 35
3.3.2
Immediate addressing ............................................................................................................... 36
3.3.3
Table indirect addressing .......................................................................................................... 37
3.3.4
Register addressing .................................................................................................................. 38
Addressing of Operand Address ...................................................................................... 39
3.4.1
Implied addressing .................................................................................................................... 39
3.4.2
Register addressing .................................................................................................................. 40
3.4.3
Direct addressing....................................................................................................................... 41
3.4.4
Short direct addressing ............................................................................................................. 42
3.4.5
Special function register (SFR) addressing ............................................................................. 44
3.4.6
Register indirect addressing ..................................................................................................... 45
3.4.7
Based addressing ...................................................................................................................... 46
3.4.8
Based indexed addressing ........................................................................................................ 47
3.4.9
Stack addressing ....................................................................................................................... 47
3.3
3.4
CHAPTER 4 PORT FUNCTIONS......................................................................................................... 49
4.1
Port Functions ..................................................................................................................... 49
4.2
Port Configuration............................................................................................................... 51
4.2.1
Port 0.......................................................................................................................................... 51
4.2.2
Port 1.......................................................................................................................................... 53
4.2.3
Port 2.......................................................................................................................................... 54
4.2.4
Port 4.......................................................................................................................................... 56
4.2.5
Port 5.......................................................................................................................................... 57
4.2.6
Port 6.......................................................................................................................................... 58
4.2.7
Port 7.......................................................................................................................................... 59
4.2.8
Port 8.......................................................................................................................................... 60
4.2.9
Port 9.......................................................................................................................................... 61
4.2.10 Port 10........................................................................................................................................ 62
4.3
Port Function Control Registers ....................................................................................... 63
4.4
Port Function Operations................................................................................................... 66
4.4.1
Writing to input/output port ....................................................................................................... 66
4.4.2
Reading from input/output port ................................................................................................. 66
4.4.3
Operations on input/output port ................................................................................................ 66
4.5
Selecting Mask Option ....................................................................................................... 67
CHAPTER 5 CLOCK GENERATOR .................................................................................................... 69
5.1
Clock Generator Functions................................................................................................ 69
5.2
Clock Generator Configuration ......................................................................................... 69
5.3
Register Controlling Clock Generation Circuit ............................................................... 70
5.4
System Clock Oscillator..................................................................................................... 71
5.4.1
Main system clock oscillator ..................................................................................................... 71
5.4.2
Divider ........................................................................................................................................ 73