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CHAPTER 13 8-BIT A/D CONVERTER (
μ
PD780024, 780024Y SUBSERIES)
13.4.3 A/D converter operation mode
One analog input channel is selected from among ANI0 to ANI7 by the analog input channel specification register
(ADS0) and start A/D conversion.
A/D conversion can be started in either of the following two ways.
Hardware start :
Conversion is started by trigger input (rising edge, falling edge, or both rising and falling
edges enabled).
Conversion is started by specifying the A/D converter mode register (ADM0).
Software start
:
The A/D conversion result is stored in the A/D conversion result register (ADCR0), and the interrupt request signal
(INTAD0) is simultaneously generated.
(1) A/D conversion by hardware start
When bit 6 (TRG0) and bit 7 (ADCS0) of the A/D converter mode register (ADM0) are set to 1, the A/D conversion
standby state is set. When the external trigger signal (ADTRG) is input, A/D conversion of the voltage applied
to the analog input pins specified by the analog input channel specification register (ADS0) starts.
Upon the end of the A/D conversion, the conversion result is stored in the A/D conversion result register (ADCR0),
and the interrupt request signal (INTAD0) is generated. After one A/D conversion operation is started and ended,
the next conversion operation is not started until a new external trigger signal is input.
If ADS0 is rewritten during A/D conversion, the converter suspends A/D conversion and waits for a new external
trigger signal to be input. When the external trigger input signal is reinput, A/D conversion is carried out from
the beginning. If ADS0 is rewritten during A/D conversion waiting, A/D conversion starts when the following
external trigger input signal is input.
If data with ADCS0 set to 0 is written to ADM0 during A/D conversion, A/D conversion stops immediately.
Caution
When P03/INTP3/ADTRG is used as the external trigger input (ADTRG), specify the valid edge
by bits 1 and 2 (EGA00, EGA01) of the A/D converter mode register (ADM0) and set the interrupt
mask flag (PMK3) to 1.