![](http://datasheet.mmic.net.cn/380000/-PD784218_datasheet_16744932/-PD784218_32.png)
μ
PD784217,784218
32
Table 8-1. Port Functions
Port Name
Pin Name
Function
Specification of Pull-up Resistor
Connection by Software
Port 0
P00 to P06
Can be set in input or output mode bit-wise
Can be specified bit-wise
Port 1
P10 to P17
Input port
—
Port 2
P20 to P27
Can be set in input or output mode bit-wise
Can be specified bit-wise
Port 3
P30 to P37
Can be set in input or output mode bit-wise
Can be specified bit-wise
Port 4
P40 to P47
Can be set in input or output mode bit-wise
Can directly drive LEDs
Can be specified in 1-port units
Port 5
P50 to P57
Can be set in input or output mode bit-wise
Can directly drive LEDs
Can be specified in 1-port units
Port 6
P60 to P67
Can be set in input or output mode bit-wise
Can be specified in 1-port units
Port 7
P70 to P72
Can be set in input or output mode bit-wise
Can be specified bit-wise
Port 8
P80 to P87
Can be set in input or output mode bit-wise
Can be specified bit-wise
Port 9
P90 to P95
N-ch open-drain I/O port
Can be set in input or output mode bit-wise
Can directly drive LEDs
—
Port 10
P100 to P103
Can be set in input or output mode bit-wise
Can be specified bit-wise
Port 12
P120 to P127
Can be set in input or output mode bit-wise
Can be specified bit-wise
Port 13
P130, P131
Can be set in input or output mode bit-wise
—
8.2 Clock Generation Circuit
An on-chip clock generation circuit necessary for operation is provided. This clock generation circuit has a divider
circuit. If high-speed operation is not necessary, the internal operating frequency can be lowered by the divider
circuit to reduce the current consumption.
Figure 8-2. Block Diagram of Clock Generation Circuit
XT2
XT1
X1
X2
STOP
Main system
clock
oscillation
circuit
Subsystem
clock
oscillation
circuit
f
XT
Watch timer,
clock output function
Clock to
peripheral hardware
CPU
clock
(f
CPU
)
Divider
circuit
Prescaler
Prescaler
Standby
control
circuit
Wait
control
circuit
f
X
f
X
2
f
XX
2
f
XX
2
2
f
XX
2
3
f
XX
S
S