
5
μ
PD78074B, 78075B
Item
Part Number
μ
PD78074B
μ
PD78075B
Internal memory
ROM
High-speed RAM
Buffer RAM
Expansion RAM
32 Kbytes
1024 bytes
32 bytes
None
64 Kbytes
8 bits
×
32 registers (8 bits
×
8 registers
×
4 banks)
On-chip instruction execution time selective function
40 Kbytes
Memory space
General registers
Instruction cycle
When main system
clock selected
When subsystem
clock selected
0.4
μ
s/0.8
μ
s/1.6
μ
s/3.2
μ
s/6.4
μ
s/12.8
μ
s (at 5.0 MHz)
122
μ
s (at 32.768 kHz)
Instruction set
16-bit operation
Multiplication/division (8 bits
×
8 bits, 16 bits
÷
8 bits)
Bit manipulation (set, reset, test, boolean operation)
BCD adjustment, etc.
Total
CMOS input
CMOS I/O
N-ch open-drain I/O
8-bit resolution
×
8 channels
8-bit resolution
×
2 channels
3-wire serial I/O, SBI, or 2-wire serial I/O mode selectable: 1 channel
3-wire serial I/O mode (on-chip max. 32-byte automatic transmit/receive
function): 1 channel
3-wire serial I/O or UART mode selectable: 1 channel
16-bit timer/event counter
: 1 channel
8-bit timer/event counter
: 4 channels
Watch timer
: 1 channel
Watchdog timer
: 1 channel
5 (14-bit PWM output
×
1, 8-bit PWM output
×
2)
19.5 kHz, 39.1 kHz, 78.1 kHz, 156 kHz, 313 kHz, 625 kHz, 1.25 MHz, 2.5 MHz,
5.0 MHz (at main system clock of 5.0 MHz)
32.768 kHz (at subsystem clock of 32.768 kHz)
1.2 kHz, 2.4 kHz, 4.9 kHz, 9.8 kHz (at main system clock of 5.0 MHz)
Internal : 15, External : 7
Internal : 1
1
Internal : 1, External : 1
V
DD
= 1.8 to 5.5 V
100-pin plastic QFP (14
×
20 mm, resin thickness 2.7 mm)
100-pin plastic QFP (fine pitch) (14
×
14 mm, resin thickness 1.45 mm)
I/O ports
: 88
:
: 78
:
2
8
A/D converter
D/A converter
Serial interface
Timer
Timer output
Clock output
Buzzer output
Vectored
interrupt
source
Test input
Supply voltage
Package
Maskable
Non-maskable
Software
OVERVIEW OF FUNCTION