
46
μ
PD78052, 78053, 78054, 78055, 78056, 78058
AC Characteristics
(1) Basic operation (T
A
= –40 to +85
°
C, V
DD
= 2.0 to 6.0 V)
Parameter
Symbol
Test Conditions
MIN.
TYP.
MAX.
Unit
Cycle time
(Min. instruction
execution time)
T
CY
Operating on main system clock
(f
XX
= 2.5 MHz)
Note 1
V
DD
= 2.7 to 6.0 V
0.8
64
μ
s
2.2
64
μ
s
Operating on main system clock
(f
XX
= 5.0 MHz)
Note 2
4.5 V
≤
V
DD
≤
6.0 V
0.4
32
μ
s
2.7 V
≤
V
DD
<
4.5 V
0.8
32
μ
s
Operating on sub system clock
40
Note 3
122
125
μ
s
TI00, TI01, TI1, TI2
input frequency
f
TI
V
DD
= 4.5 to 6.0 V
0
4
MHz
0
275
kHz
TI00 input high/
low level width
t
TIH
, t
TIL
8/f
sam
Note 4
μ
s
TI01, TI1, TI2
input high/
low-level width
t
TIH
, t
TIL
V
DD
= 4.5 to 6.0 V
100
ns
1.8
μ
s
Interrupt request
input high/low
-level width
t
INTH
, t
INTL
INTP0
8/f
sam
Note 4
μ
s
INTP1 to INTP6, KR0 to KR7
V
DD
= 2.7 to 6.0 V
10
μ
s
20
μ
s
RESET low
level width
t
RSL
V
DD
= 2.7 to 6.0 V
10
μ
s
20
μ
s
Notes 1.
Main system clock f
XX
= f
X
/2 operation (when an oscillation mode selection register (OSMS) is set to 00H)
2.
Main system clock f
XX
= f
X
operation (when OSMS is set to 01H)
3.
On an external clock. When a crystal oscillation is used, the minimum value is 114
μ
s.
4.
In combination with bits 0 (SCS0) and 1 (SCS1) of sampling clock select register (SCS), selection of f
sam
is possible between f
XX
/2
N
, f
XX
/32, f
XX
/64 and f
XX
/128 (when N= 0 to 4).