參數(shù)資料
型號： μPD78048F
廠商： NEC Corp.
英文描述： 8Bit Single Chip Microcontrollers(8位單片微控制器)
中文描述： 8位單芯片微控制器（8位單片微控制器）
文件頁數(shù)： 179/410頁
文件大小： 2424K
代理商： ΜPD78048F
CHAPTER 8 WATCH TIMER
154
8.4 Watch Timer Operations
8.4.1 Watch timer operation
When the 32.768-kHz subsystem clock is used, the timer operates as a watch timer with a 0.5 second or 0.25
second interval. In addition, when the 4.19-MHz main system clock is used, the timer can operate as a watch
timer with a 0.5 second or 1 second interval.
The watch timer sets the test input flag (WTIF) to 1 at the constant time interval. The standby state (STOP
mode/HALT mode) can be cleared by setting WTIF to 1.
When bit 2 (TMC22) of the watch timer mode control register (TMC2) is set to 0, the 5-bit counter is cleared
and the count operation stops.
For simultaneous operation of the interval timer, zero-second start can be achieved by setting TMC22 to 0
(maximum error: 26.2 ms when operated at 5.0 MHz).
8.4.2 Interval timer operation
The watch timer operates as interval timer which generates interrupt requests repeatedly at an interval of the
preset count value.
The interval time can be selected with bits 4 to 6 (TMC24 to TMC26) of the watch timer mode control register
(TMC2).
Table 8-3. Interval Timer Interval Time
TMC26
TMC25
TMC24
Interval Time
When Operated at
f
X
= 5.0 MHz
When Operated at
f
X
= 4.19 MHz
When Operated at
f
XT
= 32.768 kHz
0
0
0
2
4
×
1/f
W
819
μ
s
978
μ
s
488
μ
s
0
0
1
2
5
×
1/f
W
1.64 ms
1.96 ms
977
μ
s
0
1
0
2
6
×
1/f
W
3.28 ms
3.91 ms
1.95 ms
0
1
1
2
7
×
1/f
W
6.55 ms
7.82 ms
3.91 ms
1
0
0
2
8
×
1/f
W
13.1 ms
15.6 ms
7.81 ms
1
0
1
2
9
×
1/f
W
26.2 ms
31.3 ms
15.6 ms
Other than above
Setting prohibited
f
X
: Main system clock frequency
f
XT
: Subsystem clock oscillation frequency
f
W
: Watch timer clock frequency (f
X
/2
8
or f
XT
)
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