
CHAPTER 3 CPU ARCHITECTURE
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3.2.3 Special function register (SFR)
Unlike a general register, each special function register has special functions. It is allocated in the FF00H to
FFFFH area.
The special function register can be manipulated, like the general register, with the operation, transfer and bit
manipulation instructions. Manipulatable bit units, 1, 8 and 16, depend on the special function register type.
Each manipulation bit unit can be specified as follows:
1-bit manipulation
Describe the symbol reserved with assembler for the 1-bit manipulation instruction operand (sfr.bit).
This manipulation can also be specified with an address.
8-bit manipulation
Describe the symbol reserved with assembler for the 8-bit manipulation instruction operand (sfr).
This manipulation can also be specified with an address.
16-bit manipulation
Describe the symbol reserved with assembler for the 16-bit manipulation instruction operand (sfrp).
When addressing an address, describe an even address.
Table 3-4 gives a list of special function registers. The meaning of items in the table is as follows.
Symbol
Indicates symbols that specify the addresses of the special function registers. RA78K/0 uses these symbols
as the reserved words, and CC78K/0 has defined them in the header file named "sfrbit.h". Symbols can be
used as instruction operands if RA78K/0, ID78K0, or CC78K/0 is used.
R/W
Indicates whether the corresponding special function register can be read or written.
R/W : Read/write enable
R
: Read only
W
: Write only
Manipulatable bit units
"
√
" indicates the manipulatable bit units, 1, 8, and 16.
"–" indicates a bit unit for which manipulation is not possible.
After reset
Indicates each register status upon RESET input.