
μ
PD780306, 780308
13
3.2
OTHER PINS (1/2)
INTP0
INTP1
INTP2
INTP3
INTP4
INTP5
SI0
SI2
SI3
SO0
SO2
SO3
SB0
SB1
SCK0
SCK2
SCK3
RxD
TxD
ASCK
TI00
TI01
TI1
TI2
TO0
TO1
TO2
PCL
BUZ
S0-S23
S24-S31
S32-S39
COM0-COM3
V
LC0
-V
LC2
BIAS
Dual-
Function Pin
Pin Name
I/O
Function
On Reset
Input
Output
Output
Output
Output
Input
Serial interface serial clock input/output.
Serial interface serial data input/output.
Input
Output
Input
Input/
output
Input/
output
Output
Serial interface serial data output.
Input
Serial interface serial data input.
Input
External interrupt request input by which the effective edge (rising
edge, falling edge, or both rising edge and falling edge) can be
specified.
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Output
Input
P00/TI00
P01/TI01
P02
P03
P04
P05
P25/SB0
P70/RxD
P110
P26/SB1
P71/TxD
P111
P25/SI0
P26/SO0
P27
P72/ASCK
P112
P70/SI2, P114
P71/SO2, P113
P72/SCK2
P00/INTP0
P01/INTP1
P33
P34
P30
P31
P32
P35
P36
—
P97-P90
P87-P80
—
—
—
Output
—
—
Output
—
—
Asynchronous serial interface serial data input.
Asynchronous serial interface serial data output.
Asynchronous serial interface serial clock input.
External count clock input to 16-bit timer (TM0).
Capture trigger signal input to capture register (CR00).
External count clock input to 8-bit timer (TM1).
External count clock input to 8-bit timer (TM2).
16-bit timer (TM0) output (shared with 14-bit PWM output).
8-bit timer (TM1) output.
8-bit timer (TM2) output.
Clock output (for main system clock, subsystem clock trimming).
Buzzer output.
LCD controller/driver segment signal output.
LCD controller/driver common signal output.
LCD drive voltage. Split resistors can be incorporated by mask option.
LCD drive power supply.