
106
CHAPTER 5 CPU ARCHITECTURE
Address
Special-Function Register (SFR) Name
Symbol
R/W
After Reset
FF20H
Port mode register 0
PM0
R/W
√
√
—
FFH
FF22H
Port mode register 2
PM2
√
√
—
FF23H
Port mode register 3
PM3
√
√
—
FF24H
Port mode register 4
PM4
√
√
—
FF25H
Port mode register 5
PM5
√
√
—
FF26H
Port mode register 6
PM6
√
√
—
FF27H
Port mode register 7
PM7
√
√
—
FF30H
Pull-up resistor option register 0
PU0
√
√
—
00H
FF32H
Pull-up resistor option register 2
PU2
√
√
—
FF33H
Pull-up resistor option register 3
PU3
√
√
—
FF34H
Pull-up resistor option register 4
PU4
√
√
—
FF35H
Pull-up resistor option register 5
PU5
√
√
—
FF36H
Pull-up resistor option register 6
PU6
√
√
—
FF37H
Pull-up resistor option register 7
PU7
√
√
—
FF40H
Clock output selection register
CKS
√
√
—
FF41H
Watch timer mode control register
WTM
√
√
—
FF42H
Watchdog timer clock selection register
WDCS
—
√
—
FF47H
Memory expansion mode register
MEM
√
√
—
FF48H
External interrupt rising edge enable register
EGP
√
√
—
FF49H
External interrupt falling edge enable register
EGN
√
√
—
FF60H
16-bit timer mode control register
TMC0
√
√
—
FF61H
Prescaler mode register
PRM0
—
√
—
FF62H
Capture/compare control register 0
CRC0
√
√
—
FF63H
16-bit timer output control register 0
TOC0
√
√
—
FF70H
8-bit timer mode control register 50
TMC50
√
√
—
04H
FF71H
Timer clock selection register 50
TCL50
—
√
—
00H
FF78H
8-bit timer mode control register 51
TMC51
√
√
—
04H
FF79H
Timer clock selection register 51
TCL51
—
√
—
00H
FF80H
A/D converter mode register
ADM0
√
√
—
FF81H
Analog input channel specification register
ADS0
—
√
—
FFA0H
Asynchronous serial interface mode register
ASIM0
√
√
—
FFA1H
Asynchronous serial interface status register
ASIS0
R
—
√
—
FFA2H
Baud rate generator control register
BRGC0
R/W
—
√
—
Table 5-5. Special-Function Register List (2/3)
Manipulatable Bit Unit
8 bits
16 bits
1 bit