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參數資料
| 型號： | μPD780022 |
| 廠商： | NEC Corp. |
| 英文描述： | 8 Bit Single Chip Microcontrollers(8位單片微控制器) |
| 中文描述： | 8位單片機微控制器（8位單片微控制器） |
| 文件頁數： | 35/64頁 |
| 文件大?。?/td> | 487K |
| 代理商： | ΜPD780022 |
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35
μ
PD780021, 780022, 780023, 780024
Preliminary Data Sheet
Subsystem Clock Oscillation Circuit Characteristics
(T
A
= –40 to +85
°
C, V
DD
= 1.8 to 5.5 V)
MIN.
32
32
Notes 1.
Indicates only oscillation circuit characteristics. Refer to AC Characteristics for instruction execution time.
2.
Time required to stabilize oscillation after V
DD
reaches oscillation voltage MIN.
Resonator
Crystal
resonator
External
clock
Parameter
Oscillation
frequency (f
XT
)
Note 1
Oscillation
stabilization time
Note 2
XT1 input
frequency (f
XT
)
Note 1
XT1 input
high-/low-level width
(t
XTH
, t
XTL
)
Test Conditions
TYP.
32.768
1.2
MAX.
35
2
10
100
Unit
kHz
s
kHz
Cautions
1. When using the subsystem clock oscillator, wiring in the area enclosed with the broken line in
the above figures should be carried out as follows to avoid an adverse effect from wiring
capacitance.
Keep the wiring length as short as possible.
Do not cross the wiring with the other signal lines.
Do not route the wiring near a signal line through which a high fluctuating current flows.
Always keep the ground point of the oscillator to the same potential as V
SS
.
Do not ground the capacitor to a ground pattern in which a high current flows.
Do not fetch signals from the oscillator.
2. The subsystem clock oscillator is a low-amplitude circuit in order to achieve a low consumption
current, and is more prone to malfunction due to noise than the main system clock oscillator.
Particular care is therefore required with the wiring method when the subsystem clock is used.
V
DD
= 4.5 to 5.5 V
Recommended Circuit
XT1
XT2
μ
PD74HCU04
C3
XT2
XT1 IC
R2
C4
5
15
μ
s
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