參數(shù)資料
型號(hào)： μPD753036
廠(chǎng)商： NEC Corp.
英文描述： 4 Bit Single Chip Microcontrollers(4位單片微控制器)
中文描述： 4位單片微控制器（4位單片微控制器）
文件頁(yè)數(shù)： 59/84頁(yè)
文件大?。?/td> 596K
代理商： ΜPD753036
59
μ
PD753036
DC Characteristics (T
A
= –40 to +85
°
C, V
DD
= 1.8 to 5.5 V)
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
LCD drive voltage
V
LCD
VAC0 = 0
T
A
= –40 to +85
°
C
T
A
= –10 to 85
°
C
2.7
V
DD
V
2.2
V
DD
V
VAC0 = 1
1.8
V
DD
V
VAC current
Note 1
I
VAC
VAC0 = 1, V
DD
= 2.0 V
±
10 %
1
4
μ
A
k
k
V
LCD divider
R
LCD1
50
100
200
resistor
Note 2
R
LCD2
5
10
20
LCD output voltage
V
ODC
I
O
=
±
1.0
μ
A
V
LCD0
= V
LCD
0
±
0.2
deviation
Note 3
V
LCD1
= V
LCD
×
2/3
V
LCD2
= V
LCD
×
1/3
1.8 V
≤
V
LCD
≤
V
DD
(common)
LCD output voltage
V
ODS
I
O
=
±
0.5
μ
A
0
±
0.2
V
deviation
Note 3
(segment)
Supply current
Note 4
I
DD1
V
DD
= 5.0 V
±
10 %
Note 6
V
DD
= 3.0 V
±
10 %
Note 7
V
DD
= 5.0 V
±
10 %
mode
V
DD
= 3.0 V
±
10 %
V
DD
= 5.0 V
±
10 %
Note 6
V
DD
= 3.0 V
±
10 %
Note 7
HALT
V
DD
= 5.0 V
±
10 %
V
DD
= 3.0 V
±
10 %
V
DD
= 3.0 V
±
10 %
voltage
V
DD
= 2.0 V
±
10 %
2.5
7.5
mA
0.6
1.8
mA
I
DD2
HALT
0.9
2.7
mA
0.5
1.0
mA
I
DD1
1.7
4.5
mA
0.33
1.0
mA
I
DD2
0.7
2.0
mA
mode
0.3
0.9
mA
I
DD3
Low-
12
35
μ
A
μ
A
μ
A
μ
A
μ
A
μ
A
μ
A
μ
A
μ
A
μ
A
μ
A
μ
A
μ
A
5.5
16
mode
Note 9
V
DD
= 3.0 V, T
A
= 25 C
12
24
V
DD
= 3.0 V
±
10 %
9.2
27
V
DD
= 3.0 V, T
A
= 25 C
9.2
18
I
DD4
HALT
Low-
V
DD
= 3.0 V
±
10 %
V
DD
= 2.0 V
±
10 %
8.5
25
mode
voltage
3.0
12.0
mode
Note 9
Low power
consumption
mode
Note 10
V
DD
= 3.0 V, T
A
= 25 C
8.5
17
V
DD
= 3.0 V
±
10 %
4.6
13.8
V
DD
= 3.0 V, T
A
= 25 C
4.6
9.2
I
DD5
XT1 =
V
DD
= 5.0 V
±
10 %
V
DD
= 3.0 V
±
10 %
0.05
10
0V
Note 11
0.02
5.0
STOP mode
T
A
= 25
°
C
0.02
3.0
Notes 1.
Clear VAC0 to 0 in the low-current mode and STOP mode. When VAC0 is set to 1, the current increases
by about 1
μ
A.
Either R
LCD1
or R
LCD2
can be selected by mask option.
Voltage deviation is the difference between the ideal values (V
LCDn
; n = 0, 1, 2) of the segment and
common outputs and the output voltage.
The current flowing through the internal pull-up resistor and the LCD divider resistor is not included.
Including the case when the subsystem clock oscillates.
When the device operates in high-speed mode with the processor clock control register (PCC) set to 0011.
When the device operates in low-speed mode with PCC set to 0000.
When the device operates on the subsystem clock, with the system clock control register (SCC) set
to 1001 and oscillation of the main system clock stopped.
When the sub oscillation circuit control register (SOS) is set to 0000.
10.
When SOS is set to 0010.
11.
When SOS is set to 00
×
1 and the sub oscillation circuit feedback resistor is not used (
×
: don’t care).
2.
3.
4.
5.
6.
7.
8.
9.
32.768
kHz
Note 8
crystal
oscillation
Low current
consumption
mode
Note 10
6.00 MHz
Note 5
crystal
oscillation
C1 = C2
= 22 pF
4.19 MHz
Note 5
crystal
oscillation
C1 = C2
= 22 pF
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