
17
LIST OF FIGURES (3/6)
Figure No.
Title
Page
7-44
7-45
7-46
7-47
Timing of Operation Based on CRn0 Transitions...................................................................................
Cascade Connection Mode with 16-Bit Resolution ................................................................................
Start Timing of Timer n...........................................................................................................................
Timing After Compare Register Changes During Timer Counting..........................................................
201
203
204
204
8-1
8-2
8-3
8-4
Block Diagram of Watch Timer...............................................................................................................
Watch Timer Mode Control Register (WTNM)........................................................................................
Watch Timer Clock Selection Register (WTNCS) ..................................................................................
Operation Timing of Watch Timer/Interval Timer....................................................................................
205
207
208
210
9-1
9-2
9-3
9-4
9-5
Block Diagram of Watchdog Timer.........................................................................................................
Oscillation Stabilization Time Selection Register (OSTS)......................................................................
Watchdog Timer Clock Selection Register (WDCS)...............................................................................
Watchdog Timer Mode Register (WDTM) ..............................................................................................
Oscillation Stabilization Time Selection Register (OSTS)......................................................................
211
213
214
215
218
10-1
10-2
10-3
10-4
10-5
10-6
10-7
10-8
10-9
10-10
10-11
10-12
10-13
10-14
10-15
10-16
10-17
10-18
10-19
10-20
10-21
10-22
10-23
10-24
10-25
10-26
Block Diagram of 3-Wire Serial I/O.........................................................................................................
Serial Operation Mode Registers 0 to 3 (CSIM0 to CSIM3)...................................................................
Serial Clock Selection Registers 0 to 3 (CSIS0 to CSIS3) .....................................................................
Serial Operation Mode Registers 0 to 3 (CSIM0 to CSIM3)...................................................................
Serial Operation Mode Registers 0 to 3 (CSIM0 to CSIM3)...................................................................
Timing of 3-Wire Serial I/O Mode ...........................................................................................................
Block Diagram of I
Serial Bus Configuration Example Using I
IIC Control Register n (IICCn) ................................................................................................................
IIC Status Register n (IICSn)..................................................................................................................
IIC Clock Select Register n (IICCLn)......................................................................................................
Pin Configuration Diagram .....................................................................................................................
I
Start Conditions......................................................................................................................................
Address ..................................................................................................................................................
Transfer Direction Specification .............................................................................................................
ACK Signal.............................................................................................................................................
Stop Condition........................................................................................................................................
Wait Signal .............................................................................................................................................
Arbitration Timing Example ....................................................................................................................
Communication Reservation Timing.......................................................................................................
Timing for Accepting Communication Reservations...............................................................................
Communication Reservation Flow Chart................................................................................................
Master Operation Flow Chart .................................................................................................................
Slave Operation Flow Chart ...................................................................................................................
Example of Master to Slave Communication (When 9-Clock Wait Is Selected for Both Master
and Slave) ..............................................................................................................................................
220
221
222
223
224
225
228
229
233
237
240
242
243
243
244
245
246
247
248
273
276
277
278
280
281
2
Cn.............................................................................................................................
2
C Bus...................................................................................
2
C Bus’s Serial Data Transfer Timing....................................................................................................
283