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參數資料
| 型號： | μPD441000L-X |
| 廠商： | NEC Corp. |
| 英文描述： | 1M-Bit CMOS Static RAM(1M 位CMOS 靜態(tài)RAM) |
| 中文描述： | 100萬位CMOS靜態(tài)RAM（100萬位的CMOS靜態(tài)RAM）的 |
| 文件頁數： | 1/4頁 |
| 文件大?。?/td> | 54K |
| 代理商： | ΜPD441000L-X |
The 64-bit V
R
4121
TM
(μPD30121) microprocessor is a member of NEC’s V
R
Series
TM
devices created
for Windows
CE embedded consumer applications. Designed around the MIPS
RISC architecture
developed by MIPS Technologies, the V
R
4121 offers excellent power consumption and performance in
a highly integrated, low-cost system on a chip.
This microprocessor is the second NEC device to use the ultra-low-power-consuming V
R
4120
TM
CPU
core based on advanced 0.25-micron technology. The V
R
4120 CPU has an optimized five-stage
pipeline, 16-KB instruction cache, 8-KB data cache, multiply-accumulate (MAC) unit, and memory
management unit that enable high performance in a compact, low-cost chip. Integrated peripherals
include a power management unit, direct memory access unit, interrupt control unit, timers, real-time
clock, 16550-compatible serial interface, IrDA
interface, keyboard interface, touch-panel interface,
host signal processing unit (software modem), and A/D and D/A converters.
The V
R
4121 is compatible with MIPS III instruction set architecture (ISA) and MIPS16
application-specific extension (ASE). The MIPS16 ASE compatibility enables the V
R
4121 to
incorporate 16-bit-long instructions with conventional 32-bit-long instructions, resulting in compact
code size, a smaller memory requirement, and lower system cost.
The V
R
4121 provides an easy choice for V
R
4111
TM
customers in terms of upgrade, since the V
R
4121
and V
R
4111 are fully pin compatible. The V
R
4121 microprocessor’s high speed, compact size, and low
power consumption make it ideal for use in a battery-driven, portable handheld systems.
V
R
4 1 2 1 6 4 - B I T M I P S R I S C M I C R O P R O C E S S O R
B L O C K
D I A G R A M
97YL-0256C (10/98)
V
R
4121
Touch
Panel
LCD
Controller
PC
Card
ROM/
Flash
SDRAM/
EDO DRAM
Phase
Locked Loop
Osc
Osc
V
R
4120 CPU
(131, 168 MHz)
16K Instruction Cache
8K Data Cache
Bus Control Unit
Real-Time
Clock
Deadman's
Switch Unit
Direct Memory
Access Unit
Host Signal
Processing Unit
Power
Mgmnt Unit
Interrupt
Control Unit
Cache
Memory Unit
Software Modem
Codec
DAA
Audio
Interface Unit
General-Purpose
I/O Unit
Keyboard
Interface
Touch-Panel
Interface
16550
Serial Interface
Fast Infrared
Controller
Fast Infrared
Driver
RS232C
Driver
LED
Interface
D/A
Converter
A/D
Converter
MIC
F O R W IN D O W S C E
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