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參數(shù)資料
| 型號： | μPD23C16040AL |
| 廠商： | NEC Corp. |
| 英文描述： | 16M-Bit MASK-Programmable ROM(16M位 掩膜可編程ROM) |
| 中文描述： | 1,600位掩膜可編程ROM（1,600位掩膜可編程光盤） |
| 文件頁數(shù)： | 14/28頁 |
| 文件大小： | 260K |
| 代理商： | ΜPD23C16040AL |
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Preliminary Data Sheet
14
μ
PD441000L-X
Write Cycle Timing Chart 1 (/WE Controlled)
t
WC
t
CW1
t
AW
t
WP
t
AS
t
WR
t
WHZ
t
DW
t
DH
t
OW
Indefinite data out
High
impe-
dance
High
impe-
dance
Data in
Indefinite data out
Address(Input)
/CE1 (Input)
/WE (Input)
I/O (Input/Output)
CE2 (Input)
t
CW2
Cautions 1. During address transition, at least one of pins /CE1, CE2, /WE should be inactivated.
2. When I/O pins are in the output state, do not apply to the I/O pins signals that are
opposite in phase with output signals.
Remarks 1.
Write operation is done during the overlap time of a low level /CE1, /WE, and a high level CE2.
2.
If /CE1 changes to low level at the same time or after the change of /WE to low level, or if CE2
changes to high level at the same time or after the change of /WE to low level, the I/O pins will
remain high impedance state.
3.
When /WE is at low level, the I/O pins are always high impedance. When /WE is at high level,
read operation is executed. Therefore /OE should be at high level to make the I/O pins high
impedance.
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