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參數(shù)資料
| 型號： | Z9973BA |
| 英文描述： | DIODE TVS 15V 500W UNI-DIR |
| 中文描述： | 第十二章分布式輸出時鐘驅動器| TQFP封裝| 52PIN |塑料 |
| 文件頁數(shù)： | 6/11頁 |
| 文件大?。?/td> | 63K |
| 代理商： | Z9973BA |
3.3V, 125MHz, Multi-Output Zero Delay Buffer
Cypress Semiconductor Corporation
525 Los Coches St.
Milpitas, CA 95035. Tel: 408-263-6300, Fax: 408-263-6571
http://www.cypress.com
Document#: 38-07089 Rev. **
9/15/2000
Page 6 of 11
Z9973
Zero Delay Buffer
When used as a zero delay buffer the Z9973 will likely be in a nested clock tree application. For these applications the
Z9973 offers a low voltage PECL clock input as a PLL reference. This allows the user to use LVPECL as the primary
clock distribution device to take advantage of its far superior skew performance. The Z9973 then can lock onto the
LVPECL reference and translate with near zero delay to low skew outputs.
By using one of the outputs as a feedback to the PLL the propagation delay through the device is eliminated. The PLL
works to align the output edge with the input reference edge thus producing a near zero delay. The reference frequency
affects the static phase offset of the PLL and thus the relative delay between the inputs and outputs. Because the static
phase offset is a function of the reference clock the Tpd of the Z9973 is a function of the configuration used.
Glitch-Free Output Frequency Transitions
Customarily when output buffers have their internal counter’s changed “on the fly’ their output clock periods will:
A. Contain short or “runt” clock periods. These are clock cycles in which the cycle(s) are shorter in period than either
the old or new frequency that is being transitioned to.
B. Contain stretched clock periods. These are clock cycles in which the cycle(s) are longer in period than either the old
or new frequency that is being transitioned to.
This device specifically includes logic to guarantee that runt and stretched clock pulses do not occur if the device logic
levels of any or all of the following pins changed “on the fly” while it is operating: SELA, SELB, SELC, and VCO_SEL.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| Z9974 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:3.3V, 125-MHz, Multi-Output Zero Delay Buffer |
| Z9974CA | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FOURTEEN DISTRIBUTED-OUTPUT CLOCK DRIVER|TQFP|52PIN|PLASTIC |
| Z9975 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:3.3V, 150MHz, Multi-Output Zero Delay Buffer |
| Z9975CA | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:3.3V, 150MHz, Multi-Output Zero Delay Buffer |
| Z99SC61235 | 制造商:MINI CIRCU 功能描述:NEW |
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