參數(shù)資料
型號: XRT86VL38IB484
廠商: Exar Corporation
文件頁數(shù): 9/160頁
文件大?。?/td> 0K
描述: IC LIU/FRAMER T1/E1/J1 8CH 484BG
標準包裝: 60
控制器類型: T1/E1/J1 調幀器,LIU
電源電壓: 3.3V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 484-BGA
供應商設備封裝: 484-STBGA(23x23)
包裝: 托盤
XRT86VL38
101
OCTAL T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
REV. V1.2.0
1
SE_ENB
R/W
0
Synchronization Bit (CRC-6) Error Interrupt Enable
This bit permits the user to either enable or disable the “CRC-6 Error
Detection” Interrupt, within the XRT86VL38 device. If the user
enables this interrupt, then the Receive T1 Framer block will gener-
ate an interrupt when it detects a CRC-6 error within the incoming
T1 multiframe.
0 - Disables the “CRC-6 Error Detection” Interrupt.
1 - Enables the “CRC-6 Error Detection” Interrupt.
0
FE_ENB
R/W
0
Framing Bit Error Interrupt Enable
This bit permits the user to either enable or disable the “Framing
Alignment Bit Error Detection” Interrupt, within the XRT86VL38
device. If the user enables this interrupt, then the Receive T1
Framer block will generate an interrupt when it detects one or more
Framing Alignment Bit error within the incoming T1 data stream.
0 - Disables the “Framing Alignment Bit Error Detection” Interrupt.
1 - Enables the “Framing Alignment Bit Error Detection” Interrupt.
NOTE:
Detecting Framing Alignment Bit Error doesn't not
necessarily indicate that synchronization has been lost.
TABLE 85: FRAMER INTERRUPT ENABLE REGISTER (FIER)
HEX ADDRESS: 0XnB05
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
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