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參數(shù)資料
| 型號： | XQR18V04 |
| 廠商： | Xilinx, Inc. |
| 英文描述： | QPro XQ18V04 (XQR18V04) QML In-System Programmable Configuration PROMs |
| 中文描述： | QPro XQ18V04（XQR18V04）QML第在系統(tǒng)可編程配置PROM的 |
| 文件頁數(shù)： | 12/18頁 |
| 文件大?。?/td> | 163K |
| 代理商： | XQR18V04 |
R
Absolute Maximum Ratings
(1,2)
Recommended Operating Conditions
Quality and Reliability Characteristics
Radiation Tolerances for XQR18V04
Symbol
Description
Value
Units
V
CC
Supply voltage relative to GND
–
0.5 to +4.0
V
V
IN
Input voltage with respect to GND
–
0.5 to +5.5
V
V
TS
Voltage applied to High-Z output
–
0.5 to +5.5
V
T
STG
Storage temperature (ambient)
–
65 to +150
°
C
T
J
Junction temperature
Ceramic
+150
°
C
Plastic
+125
°
C
Notes:
1.
Maximum DC undershoot below GND must be limited to either 0.5V or 10 mA, whichever is easier to achieve. During transitions, the
device pins may undershoot to
–
2.0V or overshoot to +7.0V, provided this over- or undershoot lasts less then 10 ns and with the
forcing current being limited to 200 mA.
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress
ratings only, and functional operation of the device at these or any other conditions beyond those listed under Operating Conditions
is not implied. Exposure to Absolute Maximum Ratings conditions for extended periods of time may affect device reliability.
2.
Symbol
Parameter
Min
Max
Units
V
CCINT
Internal voltage supply (T
C
=
–
55
°
C to +125
°
C)
Internal voltage supply (T
J
=
–
55
°
C to +125
°
C)
Ceramic
3.0
3.6
V
Plastic
3.0
3.6
V
V
CCO
Supply voltage for output drivers for 3.3V operation
3.0
3.6
V
Supply voltage for output drivers for 2.5V operation
2.3
2.7
V
V
IL
Low-level input voltage
0
0.8
V
V
IH
High-level input voltage
2.0
5.5
V
V
O
Output voltage
0
V
CCO
V
Symbol
Description
Min
Max
Units
T
DR
Data retention
10
-
Years
N
PE
Program/erase cycles (Endurance)
2,000
-
Cycles
V
ESD
Electrostatic discharge (ESD)
2,000
-
Volts
Symbol
Description
Min
Max
Units
TID
Total Ionizing Dose
-
40
krad(Si)
SEL
Single Event Latch-Up
(No Latch-Up observed for LET > 120 MeV-mg/cm
2
)
-
0
cm
2
SEU
Static Memory Cell Saturation Bit Cross-Section
(No Upset observed for LET > 120 MeV-mg/cm
2
)
-
0
cm
2
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