參數(shù)資料
型號(hào)： XQ4062XL-3PQ240M
廠商： Xilinx, Inc.
英文描述： QML High-Reliability FPGAs
中文描述： QML第高可靠性的FPGA
文件頁(yè)數(shù)： 4/22頁(yè)
文件大?。?/td> 162K
代理商： XQ4062XL-3PQ240M
QPRO XQ4000XL Series QML High-Reliability FPGAs
4
www.xilinx.com
1-800-255-7778
DS029 (v1.3) June 25, 2000
Product Specification
R
XQ4000XL DC Characteristics Over Recommended Operating Conditions
Power-On Power Supply Requirements
Xilinx FPGAs require a minimum rated power supply current
capacity to insure proper initialization, and the power supply
ramp-up time does affect the current required. A fast
ramp-up time requires more current than a slow ramp-up
time. The slowest ramp-up time is 50 ms. Current capacity
is not specified for a ramp-up time faster than 2 ms. The cur-
rent capacity varies linealy with ramp-up time,
e.g.
, an
XQ4036XL with a ramp-up time of 25 ms would require a
capacity predicted by the point on the straight line drawn
from 1A at 120
μ
s to 500 mA at 50 ms at the 25 ms time
mark. This point is approximately 750 mA
.
Symbol
Description
Min
Max
Units
V
OH
High-level output voltage at I
OH
=
–
4 mA, V
CC
min (LVTTL)
High-level output voltage at I
OH
=
–
500
μ
A, (LVCMOS)
Low-level output voltage at I
OL
= 12 mA, V
CC
min (LVTTL)
(1)
Low-level output voltage at I
OL
= 1500
μ
A, (LVCMOS)
Data retention supply voltage (below which configuration data may be lost)
Quiescent FPGA supply current
(2)
2.4
-
V
90% V
CC
-
-
V
V
OL
0.4
V
-
10% V
CC
-
V
V
DR
I
CCO
I
L
C
IN
2.5
V
-
5
mA
Input or output leakage current
–
10
+10
μ
A
pF
Input capacitance (sample tested)
BGA, PQ, HQ, packages
-
10
PGA packages
-
16
pF
I
RPU
I
RPD
I
RLL
Pad pull-up (when selected) at V
IN
= 0V (sample tested)
Pad pull-down (when selected) at V
IN
= 3.6V (sample tested)
Horizontal longline pull-up (when selected) at logic Low
0.02
0.25
mA
0.02
0.15
mA
0.3
2.0
mA
Notes:
1.
2.
With up to 64 pins simultaneously sinking 12 mA.
With no output current loads, no active input or Longline pull-up resistors, all I/O pins in a High-Z state and floating.
Product
Description
Ramp-up Time
Fast (120
μ
s)
1A
Slow (50 ms)
XQ4013 - 36XL
Minimum required current supply
500 mA
XC4062XL
XC4085XL
(1)
Minimum required current supply
2A
2A
(1)
500 mA
Minimum required current supply
500 mA
Notes:
1.
2.
The XC4085XL fast ramp-up time is 5 ms.
Devices are guaranteed to initialize properly with the minimum current listed above. A larger capacity power supply may result in a
larger initialization current.
This specification applies to Commercial and Industrial grade products only.
Ramp-up Time is measured from 0V
to 3.6V
. Peak current required lasts less than 3 ms, and occurs near the internal power
on reset threshold voltage. After initialization and before configuration, I
CC
max is less than 10 mA.
3.
4.
相關(guān)PDF資料
PDF描述
XQ4062XL-3PQ240N QML High-Reliability FPGAs
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XQ4062XL-3PQ240N 制造商:XILINX 制造商全稱(chēng):XILINX 功能描述:QML High-Reliability FPGAs
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XQ4062XL-3PQ475M 制造商:XILINX 制造商全稱(chēng):XILINX 功能描述:QML High-Reliability FPGAs
XQ4062XL-3PQ475N 制造商:XILINX 制造商全稱(chēng):XILINX 功能描述:QML High-Reliability FPGAs
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