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參數(shù)資料
| 型號(hào)： | XQ4062XL-3BG228N |
| 廠商： | Xilinx, Inc. |
| 英文描述： | QML High-Reliability FPGAs |
| 中文描述： | QML第高可靠性的FPGA |
| 文件頁數(shù)： | 9/22頁 |
| 文件大?。?/td> | 162K |
| 代理商： | XQ4062XL-3BG228N |
QPRO XQ4000XL Series QML High-Reliability FPGAs
DS029 (v1.3) June 25, 2000
Product Specification
www.xilinx.com
1-800-255-7778
9
R
Dual-Port RAM Synchronous (Edge-Triggered) Write Operation Characteristics
Symbol
Dual Port RAM
Size
(1)
-3
-1
Units
Min
Max
Min
Max
Write Operation
T
WCDS
T
WPDS
T
ASDS
T
AHDS
T
DSDS
T
DHDS
T
WSDS
T
WHDS
T
WODS
Address write cycle time (clock K period)
16x1
9.0
7.7
ns
Clock K pulse width (active edge)
16x1
4.5
-
3.9
-
ns
Address setup time before clock K
16x1
2.5
-
1.7
-
ns
Address hold time after clock K
16x1
0
-
0
-
ns
D
IN
setup time before clock K
D
IN
hold time after clock K
WE setup time before clock K
16x1
2.5
-
2.0
-
ns
16x1
0
-
0
-
ns
16x1
1.8
-
1.6
-
ns
WE hold time after clock K
16x1
0
-
0
-
ns
Data valid after clock K
16x1
-
7.8
-
6.7
ns
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XQ4062XL-3BG240M | QML High-Reliability FPGAs |
| XQ4062XL-3BG240N | QML High-Reliability FPGAs |
| XQ4062XL-3BG432M | QML High-Reliability FPGAs |
| XQ4062XL-3BG475M | QML High-Reliability FPGAs |
| XQ4062XL-3BG475N | QML High-Reliability FPGAs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XQ4062XL-3BG240M | 制造商:XILINX 制造商全稱:XILINX 功能描述:QML High-Reliability FPGAs |
| XQ4062XL-3BG240N | 制造商:XILINX 制造商全稱:XILINX 功能描述:QML High-Reliability FPGAs |
| XQ4062XL-3BG432M | 制造商:XILINX 制造商全稱:XILINX 功能描述:QML High-Reliability FPGAs |
| XQ4062XL-3BG432N | 制造商:XILINX 制造商全稱:XILINX 功能描述:QML High-Reliability FPGAs |
| XQ4062XL-3BG475M | 制造商:XILINX 制造商全稱:XILINX 功能描述:QML High-Reliability FPGAs |
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