參數資料
型號: XQ4028EX-3BG196N
廠商: Xilinx, Inc.
英文描述: QML High-Reliability FPGAs
中文描述: QML第高可靠性的FPGA
文件頁數: 18/36頁
文件大?。?/td> 285K
代理商: XQ4028EX-3BG196N
QPRO XQ4000E/EX QML High-Reliability FPGAs
18
www.xilinx.com
1-800-255-7778
DS021 (v2.2) June 25, 2000
Product Specification
R
XQ4028EX Switching Characteristics
Definition of Terms
In the following tables, some specifications may be designated as Advance or Preliminary. These terms are defined as
follows:
Advance:
Initial estimates based on simulation and/or extrapolation from other speed grades, devices, or device families.
Values are subject to change. Use as estimates, not for production.
Preliminary:
Based on preliminary characterization. Further changes are not expected.
Unmarked:
Specifications not identified as either Advance or Preliminary are to be considered Final.
Except for pin-to-pin input and output parameters, the A.C. parameter delay specifications included in this document are
derived from measuring internal test patterns. All specifications are representative of worst-case supply voltage and junction
temperature conditions.
All specifications subject to change without notice.
XQ4028EX Absolute Maximum Ratings
(1)
Symbol
Description
Units
V
CC
Supply voltage relative to GND
0.5 to +7.0
V
V
IN
Input voltage relative to GND
(2)
0.5 to V
CC
+ 0.5
V
V
TS
Voltage applied to High-Z output
(2)
0.5 to V
CC
+ 0.5
V
V
CCt
Longest supply voltage rise time from 1V to 4V
50
ms
T
STG
Storage temperature (ambient)
65 to +150
°
C
T
SOL
Maximum soldering temperature (10s @ 1/16 in. = 1.5 mm)
+260
°
C
T
J
Junction temperature
Ceramic package
+150
°
C
Plastic package
+125
°
C
Notes:
1.
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress
ratings only, and functional operation of the device at these or any other conditions beyond those listed under Operating Conditions
is not implied. Exposure to Absolute Maximum Ratings conditions for extended periods of time may affect device reliability.
Maximum DC excursion above V
or below Ground must be limited to either 0.5V or 10 mA, whichever is easier to achieve.
Maximum total combined current on all dedicated inputs and Tri-state outputs must not exceed 200 mA. During transitions, the
device pins may undershoot to
2.0V or overshoot toV
CC
+2.0V, provided this over or undershoot lasts less than 10 ns and with the
forcing current being limited to 200 mA.
2.
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