參數(shù)資料
型號: XCV812E-8FG404C
廠商: Xilinx, Inc.
英文描述: Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays
中文描述: 的Virtex娥內(nèi)存擴(kuò)展1.8伏現(xiàn)場可編程門陣列
文件頁數(shù): 72/116頁
文件大小: 1087K
代理商: XCV812E-8FG404C
Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays
Module 3 of 4
18
www.xilinx.com
1-800-255-7778
DS025-3 (v2.2) July 17, 2002
R
DLL Timing Parameters
All devices are 100 percent functionally tested. Because of the difficulty in directly measuring many internal timing parameters, those
parameters are derived from benchmark timing patterns. The following guidelines reflect worst-case values across the
recommended operating conditions.
Description
Symbol
F
CLKIN
Speed Grade
Units
-8
-7
-6
Min
Max
Min
Max
Min
Max
Input Clock Frequency (CLKDLLHF)
FCLKINHF
60
320
60
320
60
260
MHz
Input Clock Frequency (CLKDLL)
FCLKINLF
25
160
25
160
25
135
MHz
Input Clock Low/High Pulse Width
T
DLLPW
25 MHz
5.0
5.0
5.0
ns
50 MHz
3.0
3.0
3.0
ns
100 MHz
2.4
2.4
2.4
ns
150 MHz
2.0
2.0
2.0
ns
200 MHz
1.8
1.8
1.8
ns
250 MHz
1.5
1.5
1.5
ns
300 MHz
1.3
1.3
NA
ns
Figure 4:
DLL Timing Waveforms
TCLKIN
TCLKIN+ TIPTOL
_
Period Tolerance:
the allowed input clock period change in nanoseconds.
Output Jitter:
the difference between an ideal
reference clock edge and the actual design.
ds022_24_091200
I
deal Period
Actual Period
+
+/- Jitter
+ Maximum
Phase Difference
+ Phase Offset
Phase Offset and Maximum Phase Difference
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XCV812E-8FG404I 制造商:XILINX 制造商全稱:XILINX 功能描述:Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays
XCV812E-8FG556C 制造商:XILINX 制造商全稱:XILINX 功能描述:Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays
XCV812E-8FG556I 制造商:XILINX 制造商全稱:XILINX 功能描述:Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays
XCV812E-8FG560C 制造商:XILINX 制造商全稱:XILINX 功能描述:Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays
XCV812E-8FG560I 制造商:XILINX 制造商全稱:XILINX 功能描述:Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays