- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄375033 > XCV812E-8BG900I (Xilinx, Inc.) Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays PDF資料下載
參數(shù)資料
| 型號： | XCV812E-8BG900I |
| 廠商： | Xilinx, Inc. |
| 英文描述： | Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays |
| 中文描述： | 的Virtex娥內(nèi)存擴展1.8伏現(xiàn)場可編程門陣列 |
| 文件頁數(shù)： | 71/116頁 |
| 文件大?。?/td> | 1087K |
| 代理商： | XCV812E-8BG900I |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁當前第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁
Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays
DS025-3 (v2.2) July 17, 2002
www.xilinx.com
1-800-255-7778
Module 3 of 4
17
R
Virtex-E Pin-to-Pin Input Parameter Guidelines
All devices are 100% functionally tested. Listed below are representative values for typical pin locations and normal clock
loading. Values are expressed in nanoseconds unless otherwise noted.
Global Clock Set-Up and Hold for LVTTL Standard,
with
DLL
Global Clock Set-Up and Hold for LVTTL Standard,
without
DLL
Description
(1)
Symbol
Device
(3)
Speed Grade
(2)
Units
Min
-8
-7
-6
Input Setup and Hold Time Relative to Global Clock Input Signal
for LVTTL Standard.
For data input with different standards, adjust the setup time
delay by the values shown in
‘‘IOB Input Switching
Characteristics Standard Adjustments’’ on page 6
.
No Delay
T
PSDLL
/T
PHDLL
XCV405E
1.5 / –0.4
1.5 / –0.4
1.6 / –0.4
1.7 / –0.4
ns
Global Clock and IFF, with DLL
XCV812E
1.5 / –0.4
1.5 / –0.4
1.6 / –0.4
1.7 / –0.4
ns
Notes:
1.
2.
IFF = Input Flip-Flop or Latch
Setup time is measured relative to the Global Clock input signal with the fastest route and the lightest load. Hold time is measured
relative to the Global Clock input signal with the slowest route and heaviest load.
DLL output jitter is already included in the timing calculation.
3.
Description
(1)
Symbol
Device
(3)
Speed Grade
(2)
Units
Min
-8
-7
-6
Input Setup and Hold Time Relative to Global Clock Input Signal
for LVTTL Standard.
For data input with different standards, adjust the setup time delay
by the values shown in
‘‘IOB Input Switching Characteristics
Standard Adjustments’’ on page 6
.
Full Delay
T
PSFD
/T
PHFD
XCV405E
2.3 / 0
2.3 / 0
2.3 / 0
2.3 / 0
ns
Global Clock and IFF, without DLL
XCV812E
2.5 / 0
2.5 / 0
2.5 / 0
2.5 / 0
ns
Notes:
1.
2.
IFF = Input Flip-Flop or Latch
Setup time is measured relative to the Global Clock input signal with the fastest route and the lightest load. Hold time is measured
relative to the Global Clock input signal with the slowest route and heaviest load.
A Zero “0” Hold Time listing indicates no hold time or a negative hold time. Negative values can not be guaranteed “best-case”, but
if a “0” is listed, there is no positive hold time.
3.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XCV812E-8FG404C | Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays |
| XCV812E-8FG404I | Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays |
| XCV812E-8FG556C | Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays |
| XCV812E-8FG556I | Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays |
| XCV812E-8FG560C | Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XCV812E-8FG404C | 制造商:XILINX 制造商全稱:XILINX 功能描述:Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays |
| XCV812E-8FG404I | 制造商:XILINX 制造商全稱:XILINX 功能描述:Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays |
| XCV812E-8FG556C | 制造商:XILINX 制造商全稱:XILINX 功能描述:Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays |
| XCV812E-8FG556I | 制造商:XILINX 制造商全稱:XILINX 功能描述:Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays |
| XCV812E-8FG560C | 制造商:XILINX 制造商全稱:XILINX 功能描述:Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。