參數(shù)資料
型號: XCV812E-8BG556C
廠商: Xilinx, Inc.
英文描述: Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays
中文描述: 的Virtex娥內(nèi)存擴展1.8伏現(xiàn)場可編程門陣列
文件頁數(shù): 69/116頁
文件大?。?/td> 1087K
代理商: XCV812E-8BG556C
Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays
DS025-3 (v2.2) July 17, 2002
www.xilinx.com
1-800-255-7778
Module 3 of 4
15
R
Block RAM Switching Characteristics
TBUF Switching Characteristics
JTAG Test Access Port Switching Characteristics
Description
(1)
Symbol
Speed Grade
Units
Min
-8
-7
-6
Sequential Delays
Clock CLK to DOUT output
T
BCKO
0.63
2.46
3.1
3.5
ns, max
Setup and Hold Times before Clock CLK
ADDR inputs
T
BACK
/T
BCKA
0.42 / 0
0.9 / 0
1.0 / 0
1.1 / 0
ns, min
DIN inputs
T
BDCK
/T
BCKD
0.42 / 0
0.9 / 0
1.0 / 0
1.1 / 0
ns, min
EN input
T
BECK
/T
BCKE
0.97 / 0
2.0 / 0
2.2 / 0
2.5 / 0
ns, min
RST input
T
BRCK
/T
BCKR
0.9 / 0
1.8 / 0
2.1 / 0
2.3 / 0
ns, min
WEN input
T
BWCK
/T
BCKW
0.86 / 0
1.7 / 0
2.0 / 0
2.2 / 0
ns, min
Clock CLK
Minimum Pulse Width, High
T
BPWH
0.6
1.2
1.35
1.5
ns, min
Minimum Pulse Width, Low
T
BPWL
0.6
1.2
1.35
1.5
ns, min
CLKA -> CLKB setup time for different ports
T
BCCS
1.2
2.4
2.7
3.0
ns, min
Notes:
1.
A Zero “0” Hold Time listing indicates no hold time or a negative hold time. Negative values can not be guaranteed “best-case”, but
if a “0” is listed, there is no positive hold time.
Description
Symbol
Speed Grade
Units
Min
-8
-7
-6
Combinatorial Delays
IN input to OUT output
T
IO
0.0
0.0
0.0
0 .0
ns, max
TRI input to OUT output high-impedance
T
OFF
0.05
0.092
0.10
0.11
ns, max
TRI input to valid data on OUT output
T
ON
0.05
0.092
0.10
0.11
ns, max
Description
Symbol
Value
Units
TMS and TDI Setup times before TCK
T
TAPTK
4.0
ns, min
TMS and TDI Hold times after TCK
T
TCKTAP
2.0
ns, min
Output delay from clock TCK to output TDO
T
TCKTDO
11.0
ns, max
Maximum TCK clock frequency
F
TCK
33
MHz, max
相關(guān)PDF資料
PDF描述
XCV812E-8BG556I Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays
XCV812E-8BG560C Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays
XCV812E-8BG560I Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays
XCV812E-8BG676C Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays
XCV812E-8BG676I Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XCV812E-8BG556I 制造商:XILINX 制造商全稱:XILINX 功能描述:Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays
XCV812E-8BG560C 功能描述:IC FPGA 1.8V C-TEMP 560-MBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:Virtex®-E EM 產(chǎn)品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標(biāo)準包裝:24 系列:XC4000E/X LAB/CLB數(shù):100 邏輯元件/單元數(shù):238 RAM 位總計:3200 輸入/輸出數(shù):80 門數(shù):3000 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應(yīng)商設(shè)備封裝:120-CPGA(34.55x34.55)
XCV812E-8BG560I 制造商:XILINX 制造商全稱:XILINX 功能描述:Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays
XCV812E-8BG676C 制造商:XILINX 制造商全稱:XILINX 功能描述:Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays
XCV812E-8BG676I 制造商:XILINX 制造商全稱:XILINX 功能描述:Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays