參數(shù)資料
型號: XCV812E-7FG560I
廠商: Xilinx, Inc.
英文描述: Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays
中文描述: 的Virtex娥內(nèi)存擴展1.8伏現(xiàn)場可編程門陣列
文件頁數(shù): 46/116頁
文件大?。?/td> 1087K
代理商: XCV812E-7FG560I
Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays
Module 2 of 4
42
www.xilinx.com
1-800-255-7778
DS025-2 (v2.1) July 17, 2002
R
SSTL2_II
A sample circuit illustrating a valid termination technique for
SSTL2_II appears in
Figure 52
. DC voltage specifications
appear in
Table 31
.
CTT
A sample circuit illustrating a valid termination technique for
CTT appear in
Figure 53
. DC voltage specifications appear
in
Table 32
.
PCI33_3 & PCI66_3
PCI33_3 or PCI66_3 require no termination. DC voltage
specifications appear in
Table 33
.
Figure 52:
Terminated SSTL2 Class II
Table 31:
SSTL2_II Voltage Specifications
Parameter
Min
Typ
Max
V
CCO
V
REF
= 0.5
×
V
CCO
V
TT
= V
REF
+ N
(1)
2.3
2.5
2.7
1.15
1.25
1.35
1.11
1.25
1.39
V
IH
= V
REF
+ 0.18
1.33
1.43
3.0
(2)
V
IL
= V
REF
– 0.18
0.3
(3)
1.07
1.17
V
OH
= V
REF
+ 0.8
1.95
-
-
V
OL
= V
REF
– 0.8
-
-
0.55
I
OH
at V
OH
(mA)
15.2
-
-
I
OL
at V
OL
(mA)
15.2
-
-
Notes:
1.
N must be greater than or equal to –0.04 and less than or
equal to 0.04.
V
IH
maximum is V
CCO
+ 0.3.
V
IL
minimum does not conform to the formula.
2.
3.
Figure 53:
Terminated CTT
50
Z = 50
SSTL2 Class II
x133_16_111699
25
50
V
REF
= 1.25V
V
TT
= 1.25V
V
TT
= 1.25V
V
CCO
= 2.5V
V
REF
= 1.5V
V
TT
= 1.5V
50
V
CCO
= 3.3V
Z = 50
CTT
x133_17_111699
Table 32:
CTT Voltage Specifications
Parameter
Min
Typ
Max
V
CCO
2.05
(1)
3.3
3.6
V
REF
1.35
1.5
1.65
V
TT
1.35
1.5
1.65
V
IH
= V
REF
+ 0.2
1.55
1.7
-
V
IL
= V
REF
– 0.2
-
1.3
1.45
V
OH
= V
REF
+ 0.4
1.75
1.9
-
V
OL
= V
REF
– 0.4
-
1.1
1.25
I
OH
at V
OH
(mA)
8
-
-
I
OL
at V
OL
(mA)
8
-
-
Notes:
1.
Timing delays are calculated based on V
CCO
min of 3.0V.
Table 33:
PCI33_3 and PCI66_3 Voltage
Specifications
Parameter
Min
Typ
Max
V
CCO
3.0
3.3
3.6
V
REF
-
-
-
V
TT
V
IH
= 0.5
×
V
CCO
V
IL
= 0.3
×
V
CCO
V
OH
= 0.9
×
V
CCO
V
OL
= 0.1
×
V
CCO
-
-
-
1.5
1.65
V
CCO
+ 0.5
0.5
0.99
1.08
2.7
-
-
-
-
0.36
I
OH
at V
OH
(mA)
Note 1
-
-
I
OL
at V
OL
(mA)
Note 1: Tested according to the relevant specification.
Note 1
-
-
相關(guān)PDF資料
PDF描述
XCV812E-7FG676C Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays
XCV812E-7FG676I Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays
XCV812E-7FG900C Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays
XCV812E-7FG900I Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays
XCV812E-8BG404C Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XCV812E-7FG676C 制造商:XILINX 制造商全稱:XILINX 功能描述:Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays
XCV812E-7FG676I 制造商:XILINX 制造商全稱:XILINX 功能描述:Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays
XCV812E-7FG900C 功能描述:IC FPGA 1.8V C-TEMP 900-FBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:Virtex®-E EM 產(chǎn)品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標(biāo)準(zhǔn)包裝:24 系列:XC4000E/X LAB/CLB數(shù):100 邏輯元件/單元數(shù):238 RAM 位總計:3200 輸入/輸出數(shù):80 門數(shù):3000 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應(yīng)商設(shè)備封裝:120-CPGA(34.55x34.55)
XCV812E-7FG900I 制造商:XILINX 制造商全稱:XILINX 功能描述:Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays
XCV812E-8BG404C 制造商:XILINX 制造商全稱:XILINX 功能描述:Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays