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參數(shù)資料
| 型號： | XCR3384XL-10PQ208I |
| 廠商： | XILINX INC |
| 元件分類： | PLD |
| 英文描述： | 384 Macrocell CPLD |
| 中文描述： | EE PLD, 10 ns, PQFP208 |
| 封裝： | PLASTIC, QFP-208 |
| 文件頁數(shù)： | 2/12頁 |
| 文件大小： | 94K |
| 代理商： | XCR3384XL-10PQ208I |
XCR3384XL: 384 Macrocell CPLD
2
1-800-255-7778Advance Product SpecificationR
DC Electrical Characteristics Over Recommended Operating Conditions
(1)
Symbol
V
OH(
2
)
Parameter
Test Conditions
Min.
Max.
Unit
Output High voltage
V
CC
= 3.0V to 3.6V, I
OH
=
–
8 mA
V
CC
= 2.7V to 3.0V, I
OH
=
–
8 mA
I
OH
=
–
500
μ
A
2.4
2.0
(
3
)
-
V
-
V
90% V
CC
-
-
V
V
OL
I
IL
I
IH
I
CCSB
I
CC
Output Low voltage
I
OL
= 8 mA
V
IN
= GND or V
CC
V
IN
= GND or V
CC
V
CC
= 3.6V
f = 1 MHz
0.4
V
Input leakage current
–
10
10
μ
A
μ
A
μ
A
mA
I/O High-Z leakage current
–
10
10
Standby current
Dynamic current
(
4
,
5
)
-
100
-
TBD
f = 50 MHz
-
TBD
mA
C
IN
C
CLK
C
I/O
Notes:
1.
2.
3.
4.
5.
Input pin capacitance
(
6
)
Clock input capacitance
(
6
)
I/O pin capacitance
(
6
)
f = 1 MHz
-
8
pF
f = 1 MHz
5
12
pF
f = 1 MHz
-
10
pF
See XPLA3 family data sheet (DS012) for recommended operating conditions
See
Figure 2
for output drive characteristics of the XPLA3 family.
This parameter guaranteed by design and characterization, not by testing.
See
Table 1
,
Figure 1
for typical values.
This parameter measured with a 16-bit, loadable up/down counter loaded into every function block, with all outputs disabled and
unloaded. Inputs are tied to V
CC
or ground. This parameter guaranteed by design and characterization, not testing.
Typical values, not tested.
6.
Figure 2:
Typical I/V Curve for the XPLA3 Family
0
0
10
20
30
40
50
60
70
80
90
100
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
Volts
I
OL
(3.3V)
I
OH
(3.3V)
I
OH
(2.7V)
m
DS012_10_041901
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