參數(shù)資料
型號(hào): XCB56364FU100
廠商: MOTOROLA INC
元件分類: 數(shù)字信號(hào)處理
英文描述: 24-Bit Audio Digital Signal Processor
中文描述: 8-BIT, 100 MHz, OTHER DSP, PQFP100
封裝: PLASTIC, TQFP-100
文件頁數(shù): 9/162頁
文件大?。?/td> 2405K
代理商: XCB56364FU100
Signal/Connection Descriptions
Clock and PLL
MOTOROLA
DSP56364 Advance Information
1-5
1.4
CLOCK AND PLL
Table 1-4 Clock and PLL Signals
Signal
Name
Type
State
during
Reset
Signal Description
EXTAL
Input
Input
External Clock Input
—An external clock source must be connected
to EXTAL in order to supply the clock to the internal clock generator
and PLL.
PCAP
Input
Input
PLL Capacitor
—PCAP is an input connecting an off-chip capacitor
to the PLL filter. Connect one capacitor terminal to PCAP and the
other terminal to V
CCP
.
If the PLL is not used, PCAP may be tied to V
CC
, GND, or left float-
ing.
PINIT/NMI
Input
Input
PLL Initial/Nonmaskable Interrupt
—During assertion of RESET,
the value of PINIT/NMI is written into the PLL Enable (PEN) bit of the
PLL control register, determining whether the PLL is enabled or dis-
abled. After RESET de assertion and during normal instruction pro-
cessing, the PINIT/NMI Schmitt-trigger input is a
negative-edge-triggered nonmaskable interrupt (NMI) request inter-
nally synchronized to internal system clock.
This input is 5 V tolerant
.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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