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參數(shù)資料
| 型號： | XCB56011BU95 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | 24-BIT DVD DIGITAL SIGNAL PROCESSOR |
| 中文描述： | 8-BIT, 95 MHz, OTHER DSP, PQFP100 |
| 封裝： | PLASTIC, TQFP-100 |
| 文件頁數(shù)： | 30/82頁 |
| 文件大?。?/td> | 318K |
| 代理商： | XCB56011BU95 |
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Preliminary Information
2-4
DSP56011 Technical Data Sheet, Rev. 1
MOTOROLA
Specifications
AC Electrical Characteristics
PRELIMINARY
C
Instruction cycle time
I
CYC
Note:
See
Table 2-5
on page 2-5 for External Clock (ET) specifications.
AC ELECTRICAL CHARACTERISTICS
The timing waveforms in the AC Electrical Characteristics are tested with a V
IL
maximum of 0.5 V and a V
IH
minimum of 2.4 V for all inputs, except EXTAL,
RESET, MODA, MODB, MODC, ACI, and SHI inputs (MOSI/ HA0, SS/ HA2,
MISO/ SDA, SCK/ SCL, HREQ). These inputs are tested using the input levels set
forth in the DC Electrical Characteristics. AC timing specifications that are
referenced to a device input signal are measured in production with respect to the
50% point of the respective input signal’s transition. DSP56011 output levels are
measured with the production test machine V
OL
and V
OH
reference levels set at
0.8 V and 2.0 V, respectively.
All output delays are given for a 50 pF load unless otherwise specified.
For load capacitance greater than 50 pF, the drive capability of the output pins
typically decreases linearly:
1. At 1.5 ns per 10 pF of additional capacitance at all output pins except
MOSI/ HA0, MISO/ SDA, SCK/ SCL, HREQ
2. At 1.0 ns per 10 pF of additional capacitance at output pins MOSI/ HA0,
MISO/ SDA, SCK/ SCL, HREQ (in SPI mode only)
INTERNAL CLOCKS
Table 2-4
Internal Clocks
Characteristics
Symbol
Expression
Minimum
Maximum
Internal operation frequency
F
0
95 MHz
Internal clock high period
with PLL disabled
1
with PLL enabled and MF
≤
4
with PLL enabled and MF > 4
T
H
ET
Hminimum
0.48
×
T
C
0.467
×
T
C
ET
Hmaximum
0.52
×
T
C
0.533
×
T
C
Internal clock low period
with PLL disabled (see Note)
with PLL enabled and MF
≤
4
with PLL enabled and MF > 4
T
ET
Lminimum
0.48
×
T
C
0.467
×
T
C
ET
Lmaximum
0.52
×
T
C
0.533
×
T
C
(DF
×
ET
C
)/ MF
2
×
T
C
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